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DSA504RT Datasheet(PDF) 24 Page - Microchip Technology |
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DSA504RT Datasheet(HTML) 24 Page - Microchip Technology |
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24 / 73 page ![]() DSA504RT Register Map Preliminary Data Sheet © 2025 Microchip Technology Inc. and its subsidiaries DS50004033A - 24 7 fusa_clr_xclk FUSA FAULT6 CLKMON clear trigger signal. 0 = normal operation 0->1 transition clears flag 6 fusa_clr_otp FUSA FAULT5 OTP Checksum clear trigger signal. FUSA FAULT6 CLKMON clear trigger signal. 0 = normal operation 0->1 transition clears flag 5 fusa_en_ts FUSA FAULT2 Temperature Sensor enable. 0 = disable 1 = enable 4:0 sel_gpio4_func GPIO4 pin function select. See the sel_gpio0_func description at address 0x51. Address: Name: Default: Type: 0x0056 config_0x56 0x0C R/W Bit Field Function Name Description 7 sel_sync_bed BED (i.e. output divider) synchronization trigger bit. Ignored if any GPIO is configured for sync in its sel_gpioX_func register field. 0 = normal operation 0->1 transition triggers BED synchronization 6 sel_bank_fs1 Frequency plan select bit. Ignored if any GPIO is configured for FS1 in its sel_gpioX_func register field. 0 = frequency plan A 1 = frequency plan B 5 sel_both_moxclk This option is not available on DSA504RT. This field must always be 0. 4 sel_refclk APLL reference clock select. Ignored if any GPIO is configured for reference select in its sel_gpioX_func register field. Always 1 : CLKIN (external CLK) clock selected. 3 sel_pad_pe567 Pull Enable (pull-up) pins 5, 6, and 7. 0 = disable 1 = enable 2 sel_pad_pe12 Pull Enable (pull-down) pins 1 and 2. 0 = disable 1 = enable 1 sel_pad_ds GPIO Drive Strength. 0 = 4mA 1 = 8mA 0 fusa_en_xclk FUSA FAULT6 CLKMON enable. 0 = disable 1 = enable Address: Name: Default: Type: 0x0057 lpflt_ctl_b 0x3F R/W Bit Field Function Name Description |
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