DSA504RT datasheet(37/73 Pages) MICROCHIP

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DSA504RT

Preliminary Data Sheet

DS50004033A - 37

cmos_drvp

OUT4 drive strength. See output0_config2p::cmos_drvp at 0x61.

cmos_drvn

OUT4b drive strength. Seeoutput0_config2::cmos_drvn at 0x61.

cmos_edge_n[2]

Concatenated with cmos_edge_n[1:0] in the output4_config1 register at

0x77:0x78.

2:0

cmos_edge_p

OUT4 CMOS edge p control. See output0_config2::cmos_edge_p at

0x61.

Address:

Name:

Default:

Type:

0x007A

output4_config3

0x00

R/W

Bit Field

Function Name

Description

7:5

reserved

—

pecl_lvds_res

Output buffer LVPECL and LVDS signal swing control. See

output0_config3::pecl_lvds_res at 0x62.

hcsl_en42ohm

Output buffer LPHCSL output impedance selector. See

output0_config3::hcsl_en42ohm at 0x62.

ldo_en

OUT0 buffer enable LDO selector. See output0_config3::ldo_en at 0x62.

en_mod18

OUT0 LVCMOS bias selector for duty cycle enhancement at 1.8V. See

output0_config3::en_mod18 at 0x62.

cmos_p_disable

OUT0 disable. See output0_config3::cmos_p_disable at 0x62.

Address:

Name:

Default:

Type:

0x007B:0x007C

output5_config0

0x0200

R/W

Bit Field

Function Name

Description

reserved

—

14:11

mode

OUT5 output buffer mode selector. See output0_config0::mode at

0x5D:0x5E.

10:0

bdiv_val_b

OUT5 buffer divider ratio, frequency plan B. See

output0_config0::bdiv_val_b at 0x5D:0x5E.

Address:

Name:

Default:

Type:

0x007D:0x007E

output5_config1

0xDA00

R/W

Bit Field

Function Name

Description

15:14

cmos_edge_n

OUT5b CMOS edge rate selector. See output0_config1::cmos_edge_n at

0x5F:0x60.

cmos_n_disable

OUT5b disable. See output0_config1::cmos_n_disable at 0x5F:0x60.

12:11

en_pass_res

OUT5 reference voltage bias adjustment for ldo_variable (PECL, LVDS,

HCSL). See output0_config1::en_pass_res at 0x5F:0x60.

10:0

bdiv_val

OUT5 buffer divider ratio, frequency plan A. See

output0_config1::bdiv_val at 0x5F:0x60.

DSA504RT Datasheet(PDF) 37 Page - Microchip Technology

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