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DSA504RT Datasheet(PDF) 16 Page - Microchip Technology

Part # DSA504RT
Description  Low-Power, Low-Jitter, Six-Output Clock Generator for Space Applications
PDF  73 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

DSA504RT Datasheet(HTML) 16 Page - Microchip Technology

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DSA504RT
Host Interface
 Preliminary Data Sheet
© 2025 Microchip Technology Inc. and its subsidiaries
DS50004033A - 16
4.
Host Interface
This section describes about I2C interface available for DSA504RT device.
4.1.
I2C Serial Interface
DSA504RT has I2C interface. The I2C interface is compatible with NXP UM10204 specifications
for standard (100kHz) and fast (400kHz) modes. During part creation in the GUI software, the
customer can select the default device I2C address provided by the GUI or can choose another client
address that’s not reserved according to Table 4-1. DSA504RT supports 7-bit addressing and 10-bit
addressing.
To solve the issue of conflict of address between two devices placed on the same I2C bus, a GPIO
can be used as the LSB (least significant bit) in the device I2C client address so the user can use that
bit to distinguish between the two devices addresses by setting it to Low (0) or High (1).
Table 4-1. Reserved Addresses
Client Address
R/W Bit
Description
0000_000
0
General call address (Note 1)
0000_000
1
Start byte (Note 2)
0000_001
X
CBUS address (Note 3)
0000_010
X
Reserved for different bus format (Note 4)
0000_011
X
Reserved for future purposes
0000_1XX
X
HS-mode host code
1111_1XX
X
Reserved for future purposes
1111_0XX
X
10-bit client addressing
Notes:
1. DSA504RT does not support general calls.
2. No device is allowed to acknowledge at the reception of START byte.
3. Reserved to enable inter-mixing of CBUS compatible and I2C-compatible devices in the same system.
4. Reserved to enable I2C compatible buses with different format to be mixed with I2C.
4.2.
I2C Byte Format
The 7-bit and 10-bit Chip ID and address structures are shown in Table 4-2 and Table 4-3. The data
byte that follows is sent MSB first, multi-byte transmissions are sent from lower byte to upper byte.
CHIPID is a 10-bit OTP register field and acts as Client Address (Call Address and CBUS Address are
not supported).
Table 4-2. I2C 7-bit CHIPID First 3 Byte Call Structure
Byte
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
1
CHIPID[6]
CHIPID[5]
CHIPID[4]
CHIPID[3]
CHIPID[2]
CHIPID[1]
CHIPID[0]
0 or 1
2
ADDR[9]
ADDR[8]
ADDR[7]
ADDR[6]
ADDR[5]
ADDR[4]
ADDR[3]
ADDR[2]
3
ADDR[1]
ADDR[0]
0
0
0
0
0
0



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