DSA504RT datasheet(49/73 Pages) MICROCHIP

49 / 73 page

DSA504RT

Preliminary Data Sheet

DS50004033A - 49

Address:

Name:

Default:

Type:

0x00CD:0x00D0

fd2_ss_id

0x00000000

R/W

Bit Field

Function Name

Description

31:0

—

FDIV2 frequency plan A spread spectrum count value.

Address:

Name:

Default:

Type:

0x00D1

fd2_config0

0x30

R/W

Bit Field

Function Name

Description

7:6

fr_pdivn

FDIV2 frequency plan A fractional divider post-divider.

0 = div 1 (bypass; not recommended),

1 = div 2 (typical value)

2 = div 4

3 = div 8

5:4

fr_pd

FDIV2 frequency plan A fractional divider power down control.

0 = Enable

3 = Power-down

3:0

reserved

—

Address:

Name:

Default:

Type:

0x00D2

fd2_config1

0x80

R/W

Bit Field

Function Name

Description

mode

FDIV2 div bits write mode. When writing fd2_div or fd2_div_b:

0 = Each byte latched separately when written (not recommended)

1 = All bytes of the multi-byte field are latched when the last byte

(highest address) is written

6:0

fr_gain_doff_s

FDIV2 frequency plan A gain offset. Signed 7-bit integer.

Address:

Name:

Default:

Type:

0x00D3

fd2_config2

0x00

R/W

Bit Field

Function Name

Description

fr_intg_mode

FDIV2 frequency plan A integer vs. fractional. Set this bit to match the

desired divide value for FDIV2.

0 = Fractional mode

1 = Integer mode

en_rem_den

FDIV2 frequency plan A remainder denominator enable.

0 = Disabled, use internal rem=0, den=1

1 = Enabled, use registers fd2_rem and fd2_den

DSA504RT Datasheet(PDF) 49 Page - Microchip Technology

DSA504RT Datasheet(HTML) 49 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73

Datasheet Download

Link URL