DSA504RT datasheet(51/73 Pages) MICROCHIP

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DSA504RT

Preliminary Data Sheet

DS50004033A - 51

Address:

Name:

Default:

Type:

0x00E0

fd2_config4

0x00

R/W

Bit Field

Function Name

Description

en_rem_den_b

FDIV2 frequency plan B remainder denominator enable.

0 = Disabled, use internal rem=0, den=1

1 = Enabled, use registers fd2_rem and fd2_den

6:0

gain_doff_s_b

FDIV2 frequency plan B gain offset. Signed 7-bit integer.

Address:

Name:

Default:

Type:

0x00E1

fd2_config5

0x60

R/W

Bit Field

Function Name

Description

fr_intg_mode_b

FDIV2 frequency plan B integer vs. fractional. Set this bit to match the

desired divide value for FDIV1.

0 = Fractional mode

1 = Integer mode

6:5

fr_pd_b

FDIV2 frequency plan B fractional divider power down control.

0 = Enable

3 = Power-down

4:0

reserved

Used to store calibration information. Please do not overwrite.

Address:

Name:

Default:

Type:

0x00E2

fd2_config6

0x00

R/W

Bit Field

Function Name

Description

7:5

reserved

—

enss_b

FDIV2 frequency plan B spread spectrum enable.

0 = Disabled

1 = Enabled

dwnen_b

FDIV2 frequency plan B spread spectrum down vs. center spread.

0 = Center

1 = Down

fr_wide_b

FDIV2 frequency plan B phase interpolator for div=4 selector.

0 = Normal

1 = div=4

1:0

fr_pdivn_b

FDIV2 frequency plan B fractional divider post-divider.

0 = div 1 (bypass; not recommended),

1 = div 2 (typical value)

2 = div 4

3 = div 8

DSA504RT Datasheet(PDF) 51 Page - Microchip Technology

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