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DSA504RT Datasheet(PDF) 38 Page - Microchip Technology

Part # DSA504RT
Description  Low-Power, Low-Jitter, Six-Output Clock Generator for Space Applications
PDF  73 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

DSA504RT Datasheet(HTML) 38 Page - Microchip Technology

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DSA504RT
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 Preliminary Data Sheet
© 2025 Microchip Technology Inc. and its subsidiaries
DS50004033A - 38
Address:
Name:
Default:
Type:
0x007F
output5_config2
0x03
R/W
Bit Field
Function Name
Description
7
en
OUT5 driver enable. See output0_config2::en at 0x61.
0 = Disabled
1 = Enabled
6
reserved
—
5
cmos_drvp
OUT5 drive strength. See output0_config2::cmos_drvp at 0x61.
4
cmos_drvn
OUT5b drive strength. See output0_config2::cmos_drvn at 0x61.
3
cmos_edge_n[2]
Concatenated with cmos_edge_n[1:0] in the output5_config1 register at
0x7D:0x7E.
2:0
cmos_edge_p
OUT5 CMOS edge p control. See output0_config2::cmos_edge_p at
0x61.
Address:
Name:
Default:
Type:
0x0080
output5_config3
0x00
R/W
Bit Field
Function Name
Description
7:5
reserved
—
4
pecl_lvds_res
Output buffer LVPECL and LVDS signal swing control. See
output0_config3::pecl_lvds_res at 0x62.
3
hcsl_en42ohm
Output buffer LPHCSL output impedance selector. See
output0_config3::hcsl_en42ohm at 0x62.
2
ldo_en
OUT0 buffer enable LDO selector. See output0_config3::ldo_en at 0x62.
1
en_mod18
OUT0 LVCMOS bias selector for duty cycle enhancement at 1.8V. See
output0_config3::en_mod18 at 0x62.
0
cmos_p_disable
OUT0 disable. See output0_config3::cmos_p_disable at 0x62.
Address:
Name:
Default:
Type:
0x0081
lpflt_ctl
0x3F
R/W
Bit Field
Function Name
Description
7:4
lpflt_rprop
APLL frequency plan A proportional path resistor.
0 = 12.5kΩ
1 = 10.0kΩ
2 = 8.0kΩ
3 = 6.0kΩ
4 = 4.5kΩ
5 = 3.0kΩ
6 = 2.0kΩ
7 = 1.25kΩ
other = insert +3kΩ post (higher-order pole)



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