| Electronic Components Datasheet Search |
|
DSA504RT Datasheet(PDF) 27 Page - Microchip Technology |
|
|
|||||||||||||||||||||||||||||
DSA504RT Datasheet(HTML) 27 Page - Microchip Technology |
|
27 / 73 page ![]() DSA504RT Register Map Preliminary Data Sheet © 2025 Microchip Technology Inc. and its subsidiaries DS50004033A - 27 Address: Name: Default: Type: 0x005A config_0x5A 0x4A R/W Bit Field Function Name Description 7 autotune APLL captune algorithm control. 0 = only controlled by retune (internal state machine) 1 = PLL will re-captune if OOL is tripped 6 ibufc_hyst_en Clock/GPIO01 input select: CMOS buffer hysteresis selector. 0 = disable 1 = enable 5 ibuf_pd Clock/GPIO01 input select: VDDMI12 LDO power down. 0 = enable (normal) 1 = disable (power down) 4 ibuf_acc Clock/GPIO01 input select: HCSL buffer coupling mode selector. 0 = DC 1 = AC 3:0 ibuf_ctrl Clock/GPIO01 input select: HCSL buffer power mode selector. 0 = 51µA 1 = 67µA 2 = 84µA 3 = 101µA (lpwr) 4 = 120µA 5 = 139µA 6 = 158µA 7 = 179µA (poly rho fast) 8 = 199µA 9 = 221µA 10 = 243µA (poly rho nom) (default) 11 = 265µA 12 = 288µA 13 = 311µA (poly rho slow) 14 = 335µA |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |