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DSA504RT Datasheet(PDF) 48 Page - Microchip Technology |
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DSA504RT Datasheet(HTML) 48 Page - Microchip Technology |
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48 / 73 page ![]() DSA504RT Register Map Preliminary Data Sheet © 2025 Microchip Technology Inc. and its subsidiaries DS50004033A - 48 3 dwnen_b FDIV1 frequency plan B spread spectrum down vs. center spread. 0 = Center 1 = Down 2 fr_wide_b FDIV1 frequency plan B phase interpolator for div=4 selector. 0 = Normal 1 = div=4 1:0 fr_pdivn_b FDIV1 frequency plan B fractional divider post-divider. 0 = div 1 (bypass; not recommended), 1 = div 2 (typical value) 2 = div 4 3 = div 8 Address: Name: Default: Type: 0x00C2:0x00C6 fd2_div 0x0000000000 R/W Bit Field Function Name Description 39:0 — FDIV2 frequency plan A fractional divider value. Bits 39:36 are integer. Bits 35:0 are fraction. Address: Name: Default: Type: 0x00C7:0x00C8 fd2_den 0x0000 R/W Bit Field Function Name Description 15:0 — FDIV2 fractional divider denominator. Can be used with fd2_rem to sigma-delta modulate FDIV2's lsb when 0ppm frequency conversion from CLKIN is required. Address: Name: Default: Type: 0x00C9:0x00CA fd2_rem 0x0000 R/W Bit Field Function Name Description 15:0 — FDIV2 fractional divider denominator. Can be used with fd2_den to sigma-delta modulate FDIV2's lsb when 0ppm frequency conversion from CLKIN is required. Address: Name: Default: Type: 0x00CB:0x00CC fd2_ss_cnt 0x0000 R/W Bit Field Function Name Description 15:0 — FDIV2 frequency plan A spread spectrum count value. |
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