DSA504RT datasheet(58/73 Pages) MICROCHIP

58 / 73 page

DSA504RT

Electrical Characteristics

Preliminary Data Sheet

DS50004033A - 58

Table 6-11. LPHCSL AC Electrical Characteristics (continued)

Electrical Characteristics: Unless otherwise indicated, VDD = 3.3V ±10%, VDD = 2.5V ±10%, VDD = 1.8V +10%/-5%, CLOAD =

2pF, TA = –40°C to +105°C.

Parameter

Symbol

Min

Typ

Max

Units Condition

Average Clock

Period Accuracy,

100MHz

tPERIOD AVG

–100

—

+1600

ppm Note 1, Note 8, Note 9

Absolute Period,

100MHz

tPERIOD ABS

9.849

—

10.181

Note 1, Note 10

Cycle-to-Cycle Jitter,

100MHz

tCCJITTER

—

TBD

—

Note 1

Rising Edge Rate

(REFCLK+) to Falling

Edge Rate (REFCLK-)

Matching

Rise-Fall

Matching

—

Note 4, Note 11, Figure 6-5

1. Measurement taken from differential waveform.

2. Measured from –150mV to +150mV on the differential waveform (derived from OUTx minus OUTxb). The signal must be

monotonic through the measurement region for rise and fall time. The 300mV measurement window is centered on the

differential zero crossing.

3. Measurement taken from single ended waveform.

4. Measured at crossing point where the instantaneous voltage value of the rising edge of OUTx equals the falling edge of

OUTxb.

5. Refers to the total variation from the lowest crossing point to the highest, regardless of which edge is crossing. Refers to

all crossing points for this measurement.

6. Defined as the total variation of all crossing voltages of Rising OUTx and Falling OUTxb. This is the maximum allowed

variance in VCROSS for any particular system.

7. tSTABLE is the time the differential clock must maintain a minimum ±150mV differential voltage after rising/falling edges

before it is allowed to droop back into the VRB ±100mV differential range.

8. Refer to Section 4.3.7.1.1 of the PCI Express Base Specification, Revision 3.0 for information regarding PPM considerations.

9. PPM refers to parts per million and is a DC absolute period accuracy specification. 1ppm is1/1,000,000th of

100.000000MHz exactly or 100Hz. For 300ppm, there is an error budget of 100Hz/ppm x 300ppm = 30kHz. The period

is to be measured with a frequency counter with the measurement window set to 100ms or greater. The ±300ppm

applies to systems that do not employ Spread Spectrum Clocking or that use a common clock source. For systems that

employ Spread Spectrum Clocking, there is an additional 2,500ppm nominal shift in maximum period resulting from the

0.5% down spread, which results in a maximum average period specification of +2,800ppm.

10. Defines as the absolute minimum or maximum instantaneous period. This includes cycle to cycle jitter, relative PPM

tolerance, and spread spectrum modulation.

11. Matching applies to the rising edge rate for OUTx and the falling edge rate for OUTxb-. It is measured using a ±75mV

window centered on the median cross point where OUTx rising meets OUTxb falling. The median cross point is used

to calculate the voltage thresholds that the oscilloscope is to use for the edge rate calculations. The Rise Edge Rate of

REFCLK+ should be compared to the Fall Edge Rate of REFCLK-. The maximum allowed difference should not exceed

20% of the slowest edge rate.

6.4.4.

LVCMOS AC Electrical Characteristics

The following table lists the LVCMOS AC electrical characteristics details.

Table 6-12. LVCMOS AC Electrical Characteristics

Electrical Characteristics: Unless otherwise indicated, VDD = 3.3V ±10%, VDD = 2.5V ±10%, VDD = 1.8V +10%/-5%, CLOAD =

2pF, TA = –40°C to +105°C.

Parameter

Symbol

Min.

Typ.

Max.

Units Condition

Output Frequency

fOUT

0.35

—

200

MHz —

DSA504RT Datasheet(PDF) 58 Page - Microchip Technology

DSA504RT Datasheet(HTML) 58 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73

Datasheet Download

Link URL