DSA504RT datasheet(41/73 Pages) MICROCHIP

41 / 73 page

DSA504RT

Preliminary Data Sheet

DS50004033A - 41

Address:

Name:

Default:

Type:

0x0088

afbbp

0x00

R/W

Bit Field

Function Name

Description

7:0

—

APLL feedback divider bit position. This defines the lsb of the afbdiv

used for sigma delta modulation for exact 0ppm frequency conversion

from the CLKIN signal. Number of bits used is 33-bp.

0 = 9.33b (XO)

…

9 = 9.24b (MO)

Address:

Name:

Default:

Type:

0x0089:0x008E

afbdiv

0x001E613716AE

R/W

Bit Field

Function Name

Description

47:42

reserved

—

41:0

—

APLL frequency plan A feedback divider value. Bits 41-33 are integer.

Bits 32:0 are fraction.

Address:

Name:

Default:

Type:

0x008F:0x0094

afbdiv_b

0x001E613716AE

R/W

Bit Field

Function Name

Description

47:42

reserved

—

41:0

—

APLL frequency plan B feedback divider value. Bits 41-33 are integer.

Bits 32:0 are fraction.

Address:

Name:

Default:

Type:

0x0095

xbar_sel01

0x3F

R/W

Bit Field

Function Name

Description

7:6

reserved

—

5:3

sel1

OUT1 source, frequency plan A. See sel0.

2:0

sel0

OUT0 source, frequency plan A .

0 = INTDIV1

1 = INTDIV2

2 = FDIV1

3 = FDIV2

4 = CLKIN (requires sel_x_xck=1)

5-7 = Disabled

DSA504RT Datasheet(PDF) 41 Page - Microchip Technology

DSA504RT Datasheet(HTML) 41 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73

Datasheet Download

Link URL