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DSA504RT Datasheet(PDF) 13 Page - Microchip Technology |
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DSA504RT Datasheet(HTML) 13 Page - Microchip Technology |
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13 / 73 page  DSA504RT Functional Description Preliminary Data Sheet © 2025 Microchip Technology Inc. and its subsidiaries DS50004033A - 13 Figure 3-11. LVPECL Output Termination (Option 2) Figure 3-12. LVCMOS Output Termination 3.9. Spread Spectrum Clocking To offer flexibility in controlling EMI interference, a Spread Spectrum Clocking (SSC) feature is incorporated in the two fractional dividers by modulating their output clock. The spread level range is ±2.5% for center spread and 0% to –2.5% for down spread with 0.1% resolution. The level of spread for each fractional divider can be set during production or post-production by using dedicated GPIO (see Table 3-1) or through I2C serial interface by setting register fields enss and dwnen for the fractional dividers. 3.10. Low Power Standby Mode The device features a standby mode that lowers power consumption. The standby mode can be activated by using a dedicated GPIO. 3.11. General Purpose IO Depending on the external clock input configuration, either differential or single-ended, DSA504RT supports up to 2 pins that can be configured as GPIOs (General Purpose Input/Output) and be |
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