EM77950 datasheet(35/102 Pages) EMC

35 / 102 page

EM77950

BB Controller

Product Specification (V1.0) 10.09.2007

• 27

(This specification is subject to change without further notice)

RAMBSX (0x04/0x07)

Bank

000

010

011

100

101

110

7.1.6 ROM Page Selector – ROMPS (0x05)

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

RPS0

As depicted in Fig. 6-1, there are two available pages in MCU. The first page has

×16 ROM size and the second page has 4K×16 ROM size. Both of them can be

accessed by defining the bits, RPS0, as shown below.

As depicted in Fig. 6-1, there are two available pages in the MCU. Each page has

12K

×16 ROM size and can be accessed by defining the bits, RPS0, as shown below.

RPS0

Page (Address)

0 (0x0000~0

×1FFF)

1 (0x2000~0

×2FFF)

7.1.7 Indirect Addressing Pointers – IAP0 (0

×06), and IAP1 (0×08)

Both R6 and R8 are not physically implemented registers. They are useful as indirect

addressing pointers. Any instruction using R6/R4 and R8/R7 as registers actually

access data pointed by R0 and R9 individually.

7.1.8 Indirect Address Pointer Direction Control Register – IAPDR

(0x0A)

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

IAP1_D

IAP0_D IAP1_D_E IAP0_D_E

Bit 0/1

(IAP0_D_E/IAP1_D_E) Indirect addressing pointer0/1 direction function enable

bit.

: Disable

: Enable

Bit 2/3

(IAP0_D/IAP1_D) Indirect addressing pointer0/1 direction control bit.

: Minus direction

: Plus direction

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