EM77950 datasheet(43/102 Pages) EMC

43 / 102 page

EM77950

BB Controller

Product Specification (V1.0) 10.09.2007

• 35

(This specification is subject to change without further notice)

7.3.10

Free Run Counter Controller – FRCC (0x94)

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

OSCO2E OSCO2SL1 OSCO2SL0

PPSCL2

PPSCL1

PPSCL0

FRCCS

Bit 0 (FRCCS):

Clock Source Select.

FRCCS

Clock Source

Selected PLL Clock Source

Selected IRC Clock Source

Bits 1 ~ 3 (PSR0 ~ PSR2):

Prescaler for the OSCO2 clock output.

PPSCL2

PPSCL1

PPSCL0

Clock Rate

1:2

1:4

1:8

1:16

1:32

1:64

1:128

1:256

Bit 4 and Bit 5 (OSCO2SL0 and OSCO1SL1):

System Clock Frequency Select

Control Bits

OSCO2SL0

OSCO2SL1

Output Frequency (MHz)

Bit 6 (OSCO2E):

OSCO2 output function mask. .

: OSCO2 disabled, function as pin PF0;

: OSCO2 enabled.

Bit 7

Reserved.

7.3.11

Watchdog Timer Controller – WDTC (0x95)

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

GREEN

WDTCE

RAT2

RAT1

RAT0

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