EM77950 datasheet(39/102 Pages) EMC

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EM77950

BB Controller

Product Specification (V1.0) 10.09.2007

• 31

(This specification is subject to change without further notice)

7.2 Dual Port Register (0x40 ~ 0x7F)

R 40 ~ R7F are dual port registers.

7.3 System Status, Control and Configuration Registers

These registers are function-oriented registers used by the CPU to record, enable or

disable the peripheral modules, interrupts, and the operation clock modes.

7.3.1

Peripherals Enable Control – PRIE (0x80)

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

SPIE

BBE

ADE

PWM1E

PWM0E

TCCE

FRCE

Bit 0 (FRCE):

Free Run Counter 0 (FRC0) Enable bit.

Bit 1 (TCCE):

Timer Clock/Counter (TCC) Enable bit.

Bit 2 (PWM0E):

PWM0 function Enable bit.

Bit 3 (PWM1E):

PWM1 function Enable bit.

Bit 4 (ADE):

ADC Enable bit.

Bit 5 (BBE):

Base Band (BB) Enable bit.

Bit 7 (SPIE):

Serial Peripheral Interface Enable bit.

: disable function

: enable function

7.3.2

Interrupts Enable Control – INTE (0x81)

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

GIE

RBFIE

PWM1IE

PWM0IE

EINT1E

EINT0E

TCCOE

FRCOE

Bit 0 (FRC0OE):

Free Run Counter (FRC) Overflow interrupt enable bit.

Bit 1 (TCCOE):

TCC (TCC) Overflow interrupt enable bit.

Bit 2 (EINT0E):

External pin (EINT0) interrupt enable bit.

Bit 3 (EINT1E):

External pin (EINT1) interrupt enable bit.

Bits 4 (PWM0IE):

PWM0 period complete enable bit.

Bits 5 (PWM1IE):

PWM1 period complete enable bit.

Bit 6 (RBFIE):

SPI Read Buffer Full (EINT) interrupt enable bit.

: disable function interrupt

: enable function interrupt

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