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EM77950 Datasheet(PDF) 78 Page - ELAN Microelectronics Corp |
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EM77950 Datasheet(HTML) 78 Page - ELAN Microelectronics Corp |
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78 / 102 page ![]() EM77950 BB Controller 70 • Product Specification (V1.0) 10.09.2007 (This specification is subject to change without further notice) 9.6 Function Description 9.6.1 Block Diagram Description The following subsections describe the function of each blocks and signals. Fig. 9.2 depicts how the SPI communication is carried out. SDI: Serial Data In SCK: Serial clock SDO: Serial Data Out RBFIF: Set by Buffer Full Detector, and reset by software SPIS: Loads the data in SPIWB register, and begin to shift Shift reg.: Shifting byte out and in. The order is defined by bit SDOD. Both the Shift register and the SPIWB registers are loaded at the same time. Once data are written to, SPIS starts transmission / reception. The received data will be moved to the SPIRB register, as the shifting of the 8-bit data is completed. The RBFIF (Read Buffer Full) flag is equal to 1. SPIRB: Read buffer. The buffer will be updated, as the 8-bit shifting is completed. The data must be read before the next reception is finished. The RBF flag is cleared as the SPIRB register is read. SPIWB: Write buffer. The buffer will deny any write until the 8-bit shifting is completed. The SPIS bit will be kept in 1 if the communication is still undergoing. This flag must be cleared as the shifting is finished. Users can determine if the next write attempt is available. SBR2~SBR0: Programming the clock frequency/rates and sources. Edge Select: Selecting the appropriate clock edges by programming the CES bit. 9.6.2 Signal & Pin Description The three pins, SDI, SDO, and SCK, which are shown in Fig. 9-1, will be explained in details as follows: SDI: SDI: Serial Data In Serial Data In Receive serially Defined as high-impedance, if not selected. |
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