EM77950 datasheet(89/102 Pages) EMC

89 / 102 page

EM77950

BB Controller

Product Specification (V1.0) 10.09.2007

• 81

(This specification is subject to change without further notice)

14.2.2

TCC Control Registers

As the TCC mode is defined, the related registers involved in this operation are shown

below:

PRC (0x0F):

Prescale counter.

TCC (0x10):

Timer clock/counter.

INTF (0x11):

Interrupt flag.

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

ADIF

RBFIF

PWM1IF

PWM0IF

EINT1F

EINT0F

TCCOF

FRCOF

PRIE (0x80):

Peripherals enable control

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

SPIE

BBE

ADE

PWM1E

PWM0E

TCCE

FRCE

INTE (0x81):

Interrupt enable control

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

GIE

RBFIE

PWM1IE

PWM0IE

EINT1E

EINT0E

TCCOE

FRCOE

TCCC (0x93):

Timer clock/counter control.

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

TCCS0

PS2

PS1

PS0

14.2.3

TCC Programming Procedures/Steps

(1) Load TCCC with the prescaler and TCC clock source.

(2) Load TCC with the TCC overflow period.

(3) Enable the interrupt function by setting TCCOE in the INTE register, if required.

(4) Enable the TCC function by setting the TCCE bit in the PRIE register.

(5) Wait for either the interrupt flag to be set (TCCOF) or the TCC interrupt to occur.

(6) The following formula describes how to calculate the TCC overflow period:

()

⎟

⎠

⎞

⎜

⎝

⎛

−

ClockSourc

escaler

TCC

Timer

TCC

100

where Clock Source = Fosc or IRC

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