EM77950 datasheet(90/102 Pages) EMC

90 / 102 page

EM77950

BB Controller

•

Product Specification (V1.0) 10.09.2007

(This specification is subject to change without further notice)

14.3

Free Run Counter

Dual 8-bit counters, high byte register and low byte register, make up the 16-bit software

programmable counter. The driving clock source is either the system clock divided by 2

or the low frequency oscillator. A read of the low byte register allows full control of the

corresponding timer function. On the contrary, accessing a high byte register will inhibit

the specific timer function until the corresponding low byte is read as well.

14.3.1

Block Diagram of FRC

LFRF

FRCOF

Data Bus

Fosc

IRC

FRCE

Sync with

Internal

Clock

FRCCS

HFRC

LFRFB

Fig. 14-2 Function Block Diagram of Timer 1

14.3.2

FRC Control Registers

As the FRC mode is defined, the related registers of this operation are shown below:

INTF (0x11):

Interrupt flag.

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

ADIF

RBFIF

PWM1IF

PWM0IF

EINT1F

EINT0F

TCCOF

FRCOF

LFRC (0x1A):

Least significant byte of 16-bit free run counter.

HFRC (0x1B):

Most significant byte of 16-bit free run counter.

LFRCB (0x1C):

Least significant byte buffer of 16-bit free run counter.

PRIE (0x80):

Peripherals enable control

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

SPIE

BBE

ADE

PWM1E

PWM0E

TCCE

FRCE

INTE (0x81):

Interrupt enable control

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

GIE

RBFIE

PWM1IE

PWM0IE

EINT1E

EINT0E

TCCOE

FRCOE

FRCC (0x94):

Free run counter control.

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

OSCO2E OSCO2SL1 OSCO2SL0 PPSCL2

PPSCL1

PPSCL0

FRCCS

EM77950 Datasheet(PDF) 90 Page - ELAN Microelectronics Corp

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