SH7616 datasheet(154/935 Pages) RENESAS

154 / 935 page

Section 4 Exception Handling

Rev. 2.00 Mar 09, 2006 page 128 of 906

REJ09B0292-0200

4.1.3

Exception Vector Table

Before exception handling begins, the exception vector table must be written in memory. The

exception vector table stores the start addresses of exception service routines. (The reset exception

table holds the initial values of PC and SP.)

All exception sources are given different vector numbers and vector table address offsets, from

which the vector table addresses are calculated. In exception handling, the start address of the

exception service routine is fetched from the exception vector table as indicated by the vector table

address.

Table 4.3 lists the vector numbers and vector table address offsets. Table 4.4 shows vector table

address calculations.

Table 4.3 (a)Exception Vector Table

Exception Source

Vector

Number

Vector Table Address

Offset

Vector Address

Power-on reset

H'00000000–H'00000003

Vector number

× 4

H'00000004–H'00000007

Manual reset

H'00000008–H'0000000B

H'0000000C–H'0000000F

General illegal instruction

H'00000010–H'00000013

VBR + (vector

(Reserved by system)

H'00000014–H'00000017

number

× 4)

Slot illegal instruction

H'00000018–H'0000001B

(Reserved by system)

H'0000001C–H'0000001F

H'00000020–H'00000023

CPU address error

H'00000024–H'00000027

DMA address error (DMAC and

E-DMAC)

10*5

H'00000028–H'0000002B

Interrupt

NMI

H'0000002C–H'0000002F

User break 12

H'00000030–H'00000033

H-UDI

H'00000034–H'00000037

(Reserved by system)

H'00000038–H'0000003B

H'0000007C–H'0000007F

Trap instruction (user vector)

H'00000080–H'00000083

H'000000FC–H'000000FF

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