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7702 Datasheet(PDF) 128 Page - Renesas Technology Corp |
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7702 Datasheet(HTML) 128 Page - Renesas Technology Corp |
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128 / 217 page ![]() TIMER A 7702/7703 Group User’s Manual 5–40 5.6 Pulse width modulation (PWM) mode Fig. 5.6.1 Structures of timer Ai mode registers and timer Ai registers in PWM mode b7 b0 b7 b0 Timer A0 register (Addresses 4716, 4616) Timer A1 register (Addresses 4916, 4816) Timer A2 register (Addresses 4B16, 4A16) Timer A3 register (Addresses 4D16, 4C16) Timer A4 register (Addresses 4F16, 4E16) Functions Bit At reset RW 15 to 0 These bits can be set to “000016” to “FFFE16.” Assuming that the set value = n, the “H” level width of the PWM pulse output from the TAiOUT pin is expressed as follows: PWM pulse’s period is expressed as follows: Undefined <When operating as a 16-bit pulse width modulator> (b15) (b8) WO n fi n16 – 1 fi fi: Frequency of count source (f2, f16, f64, or f512) <When operating as an 8-bit pulse width modulator> (b15) b7 b0 b7 b0 (b8) Timer A0 register (Addresses 4716, 4616) Timer A1 register (Addresses 4916, 4816) Timer A2 register (Addresses 4B16, 4A16) Timer A3 register (Addresses 4D16, 4C16) Timer A4 register (Addresses 4F16, 4E16) Functions Bit At reset RW 7 to 0 15 to 8 Undefined Undefined These bits can be set to “0016” to “FF16.” Assuming that the set value = m, PWM pulse’s period output from the TAiOUT pin is expressed as follows: (m + 1)(28 – 1) fi WO These bits can be set to “0016” to “FE16.” Assuming that the set value = n, the “H” level width of the PWM pulse output from the TAiOUT pin is expressed as follows: n(m + 1) fi WO fi: Frequency of count source (f2, f16, f64, or f512) b7 b6 b5 b4 b3 b2 b1 b0 Timer Ai mode register (i = 0 to 4) (Addresses 5616 to 5A16) 7 0 0 : f2 0 1 : f16 1 0 : f64 1 1 : f512 b7 b6 Count source select bits 11 1 At reset 0 RW Trigger select bits Fix this bit to “1” in PWM mode. 1 Operating mode select bits Bit name Functions 1 1 : PWM mode b1 b0 b4 b3 16/8-bit PWM mode select bit 0 0 : Writing “1” to count start bit 0 1 : (TAi IN pin functions as a pro- grammable I/O port.) 1 0 : Falling edge of TAiIN pin’s input signal 1 1 : Rising edge of TAiIN pin’s input signal Bit 0 : As a 16-bit pulse width modulator 1 : As an 8-bit pulse width modulator 4 0 2 3 5 6 0 0 0 0 0 0 0 RW RW RW RW RW RW RW RW |
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