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DS26521 Datasheet(PDF) 173 Page - Maxim Integrated Products |
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DS26521 Datasheet(HTML) 173 Page - Maxim Integrated Products |
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173 / 258 page  DS26521 Single T1/E1/J1 Transceiver 173 of 258 Register Name: TCICE1, TCICE2, TCICE3, TCICE4 Register Description: Transmit Channel Idle Code Enable Registers 1 to 4 Register Address: 150h, 151h, 152h, 153h Bit # (MSB) 7 6 5 4 3 2 1 0 (LSB) Name CH8 CH7 CH6 CH5 CH4 CH3 CH2 CH1 TCICE1 CH16 CH15 CH14 CH13 CH12 CH11 CH10 CH9 TCICE2 CH24 CH23 CH22 CH21 CH20 CH19 CH18 CH17 TCICE3 CH32 CH31 CH30 CH29 CH28 CH27 CH26 CH25 TCICE4 (E1 Mode Only) Default 0 0 0 0 0 0 0 0 The Transmit Channel Idle Code Enable registers (TCICE1:TCICE4) are used to determine which of the 24 T1 channels (or 32 E1 channels) from the backplane should be overwritten with the code placed in the Transmit Idle Code Definition register (TIDR1:TIDR32). Bits 7 to 0: Transmit Channels 1 to 32 Code Insertion Control Bits (CH[1:32]). 0 = do not insert data from the Idle Code Array into the transmit data stream 1 = insert data from the Idle Code Array into the transmit data stream |
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