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DS26521 Datasheet(PDF) 169 Page - Maxim Integrated Products

Part # DS26521
Description  Single T1/E1/J1 Transceiver
PDF  258 Pages
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Manufacturer  MAXIM [Maxim Integrated Products]
Direct Link  https://www.maximintegrated.com/en.html
Logo MAXIM - Maxim Integrated Products

DS26521 Datasheet(HTML) 169 Page - Maxim Integrated Products

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DS26521 Single T1/E1/J1 Transceiver
169 of 258
Register Name:
THBSE
Register Description:
Transmit HDLC Bit Suppress Register
Register Address:
111h
Bit #
7
6
5
4
3
2
1
0
Name
TBSE8
TBSE7
TBSE6
TBSE5
TBSE4
TBSE3
TBSE2
TBSE1
Default
0
0
0
0
0
0
0
0
Bit 7: Transmit Bit 8 Suppress (TBSE8). MSB of the channel. Set to one to stop this bit from being used.
Bit 6: Transmit Bit 7 Suppress (TBSE7). Set to one to stop this bit from being used.
Bit 5: Transmit Bit 6 Suppress (TBSE6). Set to one to stop this bit from being used.
Bit 4: Transmit Bit 5 Suppress (TBSE5). Set to one to stop this bit from being used.
Bit 3: Transmit Bit 4 Suppress (TBSE4). Set to one to stop this bit from being used.
Bit 2: Transmit Bit 3 Suppress (TBSE3). Set to one to stop this bit from being used.
Bit 1: Transmit Bit 2 Suppress (TBSE2). Set to one to stop this bit from being used.
Bit 0: Transmit Bit 1 Suppress (TBSE1). LSB of the channel. Set to one to stop this bit from being used.
Register Name:
THC2
Register Description:
Transmit HDLC Control Register 2
Register Address:
113h
Bit #
7
6
5
4
3
2
1
0
Name
TABT
SBOC
THCEN
THCS4
THCS3
THCS2
THCS1
THCS0
TABT
—
THCEN
THCS4
THCS3
THCS2
THCS1
THCS0
Default
0
0
0
0
0
0
0
0
Bit 7: Transmit Abort (TABT). A 0-to-1 transition will cause the FIFO contents to be dumped and one FEh abort to
be sent followed by 7Eh or FFh flags/idle until a new packet is initiated by writing new data into the FIFO. Must be
cleared and set again for a subsequent abort to be sent.
Bit 6: Send BOC (SBOC) (T1 Mode Only). Set = 1 to transmit the BOC code placed in bits 0 to 5 of the T1TBOC
register.
Bit 5: Transmit HDLC Controller Enable (THCEN).
0 = Transmit HDLC controller is not enabled.
1 = Transmit HDLC controller is enabled.
Bits 4 to 0: Transmit HDLC Channel Select (THCS[4:0]). Determines which DSO channel will carry the HDLC
message if enabled. Changes to this value are acknowledged only upon a transmit HDLC controller reset (THR at
THC1.5).



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