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DS26521 Datasheet(PDF) 165 Page - Maxim Integrated Products |
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DS26521 Datasheet(HTML) 165 Page - Maxim Integrated Products |
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165 / 258 page ![]() DS26521 Single T1/E1/J1 Transceiver 165 of 258 Register Name: RCBR1, RCBR2, RCBR3, RCBR4 Register Description: Receive Channel Blocking Registers 1 to 4 Register Address: 0C4h, 0C5h, 0C6h, 0C7h Bit # 7 6 5 4 3 2 1 0 Name CH8 CH7 CH6 CH5 CH4 CH3 CH2 CH1 RCBR1 CH16 CH15 CH14 CH13 CH12 CH11 CH10 CH9 RCBR2 CH24 CH23 CH22 CH21 CH20 CH19 CH18 CH17 RCBR3 CH32 CH31 CH30 CH29 CH28 CH27 CH26 CH25 (F-bit) RCBR4* (E1 Mode Only) Default 0 0 0 0 0 0 0 0 Bits 7 to 0: Receive Channel Blocking Control Bits for Channels 1 to 32 (CH[1:32]). 0 = force the RCHBLK pin to remain low during this channel time 1 = force the RCHBLK pin high during this channel time *Note that RCBR4 has two functions: When 2.048MHz backplane mode is selected, this register allows the user to enable the channel blocking signal for any of the 32 possible backplane channels. When 1.544MHz backplane mode is selected, the LSB of this register determines whether or not the RCHBLK signal will pulse high during the F-Bit time. In this mode, RCBR4.1:RCBR4.7 should be set to 0. RCBR4.0 = 0, do not pulse RCHBLK during the F-bit. RCBR4.0 = 1, pulse RCHBLK during the F-bit. Register Name: RSI1, RSI2, RSI3, RSI4 Register Description: Receive-Signaling Reinsertion Enable Registers 1 to 4 Register Address: 0C8h, 0C9h, 0CAh, 0CBh Bit # 7 6 5 4 3 2 1 0 Name CH8 CH7 CH6 CH5 CH4 CH3 CH2 CH1 RSI1 CH16 CH15 CH14 CH13 CH12 CH11 CH10 CH9 RSI2 CH24 CH23 CH22 CH21 CH20 CH19 CH18 CH17 RSI3 CH32 CH31 CH30 CH29 CH28 CH27 CH26 CH25 RSI4 (E1 Mode Only) Default 0 0 0 0 0 0 0 0 Setting any of the CH[1:24] bits in the RSI1:RSI3 registers causes signaling data to be reinserted for the associated channel. RSI4 is used for 2.048MHz backplane operation. |
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