DP8344 datasheet(176/184 Pages) NSC

176 / 184 page

60 Reference Section (Continued)

623 Bit Definition Tables

(Continued)

6232 Transceiver

(Continued)

Table includes control and status bits only It does not include definitions of bit fields provided for the formatting (de-formatting)

data frames For further information see the Transceiver section

Bit

Name

Location Reset State

Function

Transceiver TCS10 Transceiver Clock

DCR 65

Selects transceiver clock TCLK source

Control

elect

TCS10

TCLK

(Continued)

0 0

OCLK

0 1

OCLK2

1 0

OCLK4

1 1

X-TCLK

OCLK is the frequency of the on-chip oscillator or the

externally applied clock on input X1 X-TCLK is the external

transceiver clock input

TRES

ransceiver RESet

TMR 7

Resets transceiver when high Transceiver can also be reset

by RESET without affecting TRES

Transmitter

ATA

dvance Transmitter TCR 4

When high TX-ACT is advanced one half bit time so that the

transmitter can generate 55 line quiesce pulses

Control

ctive

AT7–3

uxiliary

ATR 7–3

XXXXX

In 5250 modes Controls the time TX-ACT is held after the last

fill bit

ransceiver control

AT7–3

TX-ACT Hold Time (ms)

(If TCLK e 8 MHz)

00000

00001

0 5

00010

11111

155

FB7–0

ill Bit select

FBR 7–0

XXXX XXXX The value in this register contains the 1’s complement of the

number of additional 5250 fill bits selected

OWP

dd Word Parity

TCR 3

Controls transmitter word parity

OWP

Word Parity

Even

Odd

TF10 – 8 Transmit FIFO

TCR 2–0

000

OWP

TF10 – 8 and RTF7 – 0 are pushed onto the

transmit FIFO on moves to RTR

TIN

ransmitter INvert

TMR 3

When high the transmitter serial data outputs are inverted

Receiver

AT7 – 0

uxiliary

ATR 7–0

XXXX XXXX In 5250 modes AT2–0 contains the station address In 8-bit

modes AT7–0 contains the station address

Control

ransceiver control

RF10 – 8 Receive FIFO

TSR 2–0

XXX

Reflects the state of the most significant 3 bits in the top

location of the receive FIFO

RIN

eceiver INvert

TMR 4

When high the receiver serial data is inverted

RLQ

eceive Line

TCR 7

Selects number of line quiesce bits the receiver requires

before it will indicate receipt of a valid start sequence

uiesce

RLQ Number of Line Quiesce Pulses

RPEN

ePeat ENable

TMR 5

When high the receiver can be active at the same time as the

transmitter

SEC

elect Error Codes

TCR 6

When high

ECR is switched into RTR location

176

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