7702 datasheet(109/217 Pages) RENESAS

109 / 217 page

TIMER A

7702/7703 Group User’s Manual

5–21

5.4 Event counter mode

Fig. 5.4.1 Structures of timer Ai mode register and timer Ai register in event counter mode

00 1

Bit

Up-down switching factor select

bit

Count polarity select bit

Bit name

These bits are ignored in event counter mode.

Fix this bit to “0” in event counter mode.

! : It may be either “0” or “1.”

Functions

0 : Counts at falling edge of external signal

1 : Counts at rising edge of external signal

0 : Contents of up-down register

1 : Input signal to TAiOUT pin

At reset

Pulse output function select bit

Operating mode select bits

0 : No pulse output (TAiOUT pin

functions as a programmable I/O

port.)

1 : Pulse output (TAiOUT pin functions

as a pulse output pin.)

0 1 : Event counter mode

b1 b0

Timer Ai mode register (i = 0 to 4) (Addresses 5616 to 5A16)

(b15)

(b8)

Timer A0 register (Addresses 4716, 4616)

Timer A1 register (Addresses 4916, 4816)

Timer A2 register (Addresses 4B16, 4A16)

Timer A3 register (Addresses 4D16, 4C16)

Timer A4 register (Addresses 4F16, 4E16)

15 to 0

Bit

Functions

At reset

These bits can be set to “000016” to “FFFF16.”

Assuming that the set value = n, the counter

divides the count source frequency by n + 1

when down-counting, or by FFFF16 – n + 1

when up-counting.

When reading, the register indicates the

counter value.

Undefined

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