7702 datasheet(116/217 Pages) RENESAS

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TIMER A

7702/7703 Group User’s Manual

5–28

5.4 Event counter mode

qQuadruple processing

The timer up-counts all rising and falling edges to the TA4OUT and TA4IN pins when the phase has

the relationship that the TA4IN pin’s input signal level goes from “L” to “H” while the TA4OUT pin’s

input signal is “H” level.

The timer down-counts all rising and falling edges to the TA4OUT and TA4IN pins when the phase

has the relationship that the TA4IN pin’s input signal level goes from “H” to “L” while the TA4OUT

pin’s input signal is “H” level. (Refer to Figure 5.4.8.)

Table 5.4.3 lists the input signals to the TA4OUT and TA4IN pins when the quadruple processing is

selected.

Table 5.4.3 TA4OUT and TA4IN pins’ input signals when

quadruple operation is selected

Input signal to TA4OUT pin Input signal to TA4IN pin

“H” level

“L” level

Rising

Falling

“H” level

“L” level

Rising

Falling

Rising

Falling

“L” level

“H” level

Falling

Rising

“H” level

“L” level

Up-count

Down-count

Fig. 5.4.8 Quadruple processing

TA4OUT

TA4IN

“H”

“L”

Up-count all edges

–1

Down-count all edges

Up-count all edges

Down-count all edges

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