DS26521 datasheet(237/258 Pages) MAXIM

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DS26521 Single T1/E1/J1 Transceiver

237 of 258

12.

AC TIMING CHARACTERISTICS

Unless otherwise noted, all timing numbers assume 20pF test load on output signals, 40pF test load on bus

signals.

12.1

Microprocessor Bus AC Characteristics

12.1.1 Parallel Port Mode

Table 12-1. AC Characteristics—Microprocessor Bus Timing

(VDD = 3.3V ±5%, TA = -40°C to +85°C.) (Note 1) (See Figure 12-1, Figure 12-2, Figure 12-3, and

Figure 12-4.)

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

Setup Time for A12, A[8:0] Valid to

CSBn

Active

Setup Time for

CSB Active to Either RDB,

WRB Active

Delay Time from Either

RDB or DSB

Active to D[7:0] Valid

(Note 2)

125

Hold Time from Either

RDB or WRB

Inactive to

CSB Inactive

Hold Time from

CSB or RDB or DSB

Inactive to D[7:0] Tri-State

Wait Time from

WRB Active to Latch Data

Data Setup Time to

WRB Inactive

Data Hold Time from

WRB Inactive

Address Hold from

WRB Inactive

Write Access to Subsequent Write/Read

Access Delay Time

t10

(Note 2)

Note 1:

The timing parameters in this table are guaranteed by design (GBD).

Note 2:

If supplying a 1.544MHz MCLK, the FREQSEL bit must be set to meet this timing.

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