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GX1 Datasheet(PDF) 176 Page - National Semiconductor (TI) |
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GX1 Datasheet(HTML) 176 Page - National Semiconductor (TI) |
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176 / 247 page ![]() www.national.com 176 Revision 1.0 Integrated Functions (Continued) 4.7.8.3 PCI Arbitration An agent requests the bus by asserting its REQ#. Based on the arbitration scheme set in the PCI Arbitration Control 2 register (Index 44h), the GX1 processor’sPCI arbiter will grant the request by asserting GNT#. Figure 4-20 illus- trates basic arbitration. REQ#-a is asserted at CLK 1. The PCI arbiter grants access to Agent A by asserting GNT#-a on CLK 2. Agent A must begin a transaction by asserting FRAME# within 16 clocks, or the GX1’s PCI arbiter will remove GNT#. Also, it is possible for Agent A to lose bus ownership sooner if another agent with higher priority requests the bus. How- ever, in this example, Agent B is of higher priority than Agent A. When Agent B requests the bus on CLK 2, Agent A is allowed to proceed per Specification. Agent A starts its transaction on CLK 3 by asserting FRAME# and completes its transaction. Since Agent A requests another transac- tion, REQ#-a remains asserted. When FRAME# is asserted on CLK 3, the PCI arbiter determines Agent B should go next, asserts GNT#-b and deasserts GNT#-a on CLK 4. Agent B requires only a single transaction. It com- pletes the transaction, then deasserts FRAME# and REQ#-b on CLK 6. The PCI arbiter can then grant access to Agent A, and does so on CLK 7. Note that all buffers must flush before a grant is given to a new agent. For additional information refer to Chapter 3.4.1, Arbitration Signaling Protocol, of the PCI Local Bus Specification, Revision 2.1. 4.7.8.4 PCI Halt Command Halt is a broadcast message from the GX1 processor indi- cating it has executed a HALT instruction. The PCI Special Cycle command is used to broadcast the message to all agents on the bus segment. During the address phase of the Halt Special cycle, C/BE[3:0]# = 0001 and AD[31:0] are driven to arbitrary values. During the data phase, C/ BE[3:0]# = 1100 indicating bytes 1 and 0 are valid and AD[15:0] = 0001h. For additional information, refer to Chapter 3.7.2, Special Cycle, and Appendix A, Special Cycle Messages, of the PCI Local Bus Specification, Revision 2.1. Figure 4-20. Basic Arbitration CLK REQ#-a REQ#-b GNT#-a GNT#-b FRAME# AD DATA ADDR DATA ADDR Agent-A Agent-B 1 2 3 4567 8 9 |
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