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GX1 Datasheet(PDF) 232 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part # GX1
Description  Processor Series Low Power Integrated x86 Solution
PDF  247 Pages
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Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

GX1 Datasheet(HTML) 232 Page - National Semiconductor (TI)

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232
Revision 1.0
Instruction Set (Continued)
SUB Integer Subtract
Register to Register
2 [10dw] [11 reg r/m]
x
-
-
-
xxxxx
1
1
b
h
Register to Memory
2 [100w] [mod reg r/m]
1
1
Memory to Register
2 [101w] [mod reg r/m]
1
1
Immediate to Register/Memory
8 [00sw] [mod 101 r/m] ###
1
1
Immediate to Accumulator (short form)
2 [110w] ###
1
1
SVDC Save Segment Register and Descriptor
0F 78 [mod sreg3 r/m]
---------
20
20
s
s
SVLDT Save LDTR and Descriptor
0F 7A [mod 000 r/m]
---------
20
20
s
s
SVTS Save TSR and Descriptor
0F 7C [mod 000 r/m]
---------
21
21
s
s
TEST Test Bits
Register/Memory and Register
8 [010w] [mod reg r/m]
0
-
-
-
x
x
u
x
0
1
1
b
h
Immediate Data and Register/Memory
F [011w] [mod 000 r/m] ###
1
1
Immediate Data and Accumulator
A [100w] ###
1
1
VERR Verify Read Access
To Register/Memory
0F 00 [mod 100 r/m]
-----x
---
8
a
g,h,j,p
VERW Verify Write Access
To Register/Memory
0F 00 [mod 101 r/m]
-----x
---
8
a
g,h,j,p
WAIT Wait Until FPU Not Busy
9B
---------
1
1
WBINVD Write-Back and Invalidate Cache
0F 09
---------
23
23
t
t
WRMSR Write to Model Specific Register
0F 30
---------
XADD Exchange and Add
Register1, Register2
0F C[000w] [11 reg2 reg1]
x-
-
-
xxxxx
2
2
Memory, Register
0F C[000w] [mod reg r/m]
2
2
XCHG Exchange
Register/Memory with Register
8[011w] [mod reg r/m]
---------
2
2
b,f
f,h
Register with Accumulator
9[0 reg]
2
2
XLAT Translate Byte
D7
---------
5
5
h
XOR Boolean Exclusive OR
Register to Register
3 [00dw] [11 reg r/m]
0
-
-
-
x
x
u
x
0
1
1
b
h
Register to Memory
3 [000w] [mod reg r/m]
1
1
Memory to Register
3 [001w] [mod reg r/m]
1
1
Immediate to Register/Memory
8 [00sw] [mod 110 r/m] ###
1
1
Immediate to Accumulator (short form)
3 [010w] ###
1
1
Table 8-27. Processor Core Instruction Set Summary (Continued)
Instruction
Opcode
Flags
Real
Mode
Prot’d
Mode
Real
Mode
Prot’d
Mode
OD I
T
S Z
A P C
FFFFFFFFF
Clock Count
(Reg/Cache Hit)
Issues



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