LM93 datasheet(36/95 Pages) TI1

36 / 95 page

LM93

SNAS210E – DECEMBER 2003 – REVISED MARCH 2013

www.ti.com

Duty cycle levels may be skipped by setting their offset value to zero. As shown in Table 3-2, the 53.57%

duty cycle step is skipped. When the temperature exceeds 74°C for CPU1 and 64°C for CPU2 the duty

cycle changes from 50% to 57.14%.

Figure 3-5. Example of the LM93 Fan Control Transfer Function.

Table 3-2. Zone 1/2 (CPU1 and CPU2) Table(1)

Lookup Table

Zone 1/2

Tbase

CPU1 Thermal Diode, Zone 1 (TD)

Tbase

CPU2 Thermal Diode, Zone 2 (TD)

Duty Cycle

Toffset

CPU1,

CPU2,

table

Zone1

Zone2

(%)

(°C)

TD<

28.57

32.14

35.71

39.29

42.86

0.5

≤TD<

70.5

≤TD<

60.5

46.43

1.5

70.5

≤TD<

60.5

≤TD<

53.57

57.14

≤TD<

71.43

1.5

≤TD<

76.5

≤TD<

66.5

85.71

1.5

76.5

≤TD<

66.5

≤TD<

100

≤TD

(1)

In this example: Zones 1 and 2 are bound to the PWM1 output and the PWM1 frequency set to a value in the low range; Hysteresis is

set to 2°C; Toffset and hysteresis resolution is set to 0.5°C; minPWM register set to 05h for Zones 1/2. Note, the duty cycle assignment

depends on the zone to PWM output binding and the frequency setting of that PWM output.

Functional Description

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