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LM93 Datasheet(PDF) 79 Page - Texas Instruments |
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LM93 Datasheet(HTML) 79 Page - Texas Instruments |
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79 / 95 page  LM93 www.ti.com SNAS210E – DECEMBER 2003 – REVISED MARCH 2013 Bit Name R/W Description 0 GPI0_MSK R/W When this bit is set, GPI0 error events are masked. 1 GPI1_MSK R/W When this bit is set, GPI1 error events are masked. 2 GPI2_MSK R/W When this bit is set, GPI2 error events are masked. 3 GPI3_MSK R/W When this bit is set, GPI3 error events are masked. 4 GPI4_MSK R/W When this bit is set, GPI4 error events are masked. 5 GPI5_MSK R/W When this bit is set, GPI5 error events are masked. 6 GPI6_MSK R/W When this bit is set, GPI6 error events are masked. 7 GPI7_MSK R/W When this bit is set, GPI7 error events are masked. These bits mask the corresponding bits in the B_ and H_GPI Error Status Registers. They do not effect the GPI State register. 3.17.10.2 Register EDh Miscellaneous Error Mask Register Read/ Register Default Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Address Write Name Value Miscellan DVccp2 DVccp1 SCSI2 SCSI1 VRD2 VRD1 eous _MSK _MSK _MSK _MSK _MSK _MSK EDh R/W RES 3Fh Error Mask Bit Name R/W Description 0 VRD1_MSK R/W When this bit is set, VRD1_HOT error events are masked. 1 VRD2_MSK R/W When this bit is set, VRD2_HOT error events are masked. 2 SCSI1_MSK R/W When this bit is set, SCSI_TERM1 error events are masked. 3 SCSI2_MSK R/W When this bit is set, SCSI_TERM2 error events are masked. 4 DVccp1_MSK R/W When this bit is set, dynamic Vccp limit error events for AD_IN7 (CPU1) are masked. 5 DVccp2_MSK R/W When this bit is set, dynamic Vccp limit error events for AD_IN8 (CPU2) are masked. 7:6 RES R Reserved 3.17.10.3 Register EEh Special Function Zone 1 Adjustment Offset Register Read/ Register Default Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Address Write Name Value Special Function EEh R/W Zone 1 RES RES Z1_ADJUST 00h Adjustme nt Offset Bit Name R/W Description 5:0 Z1_ADJUST R/W 6-bit signed 2’s complement offset adjustment. This value is added to all zone 1 temperature measurements as they are made. All LM93 registers and functions behave as if the resulting temperature was the true measured temperature. This register allows offset adjustments from +31°C to −32°C in 1°C steps. 7:6 RES R Reserved Copyright © 2003–2013, Texas Instruments Incorporated Functional Description 79 Submit Documentation Feedback Product Folder Links: LM93 |
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