BT8376EPF datasheet(198/323 Pages) CONEXANT

198 / 323 page

Bt8370/8375/8376

3.13 Transmit Sa-Byte Buffers

Fully Integrated T1/E1 Framer and Line Interface

3-80

Conexant

N8370DSE

3.13 Transmit Sa-Byte Buffers

Unused bits indicated by a dash (—) are reserved and should be written to 0. Writing to reserved bits has no

effect.

Five transmit Sa-Byte buffers (TSA4–TSA8) are used to insert Sa-bits in TS0. The entire group of 40 bits is

sampled every 16 frames, coincident with the TMF interrupt boundary [addr 008]. Bit 0 from each TSA register

is then inserted during frame 1: bit 1 is inserted during frame 3; bit 2 is inserted during frame 5; and so on. This

gives the processor a maximum of 2 ms after the TMF interrupt to write new Sa-Byte buffer values. Transmit

Sa-bits maintain a fixed relationship to the transmit CRC multiframe.

07B—Transmit Sa4 Byte Buffer (TSA4)

TSA4[7]

Sa4 bit transmitted in frame 15

TSA4[6]

Sa4 bit transmitted in frame 13

TSA4[5]

Sa4 bit transmitted in frame 11

TSA4[4]

Sa4 bit transmitted in frame 9

TSA4[3]

Sa4 bit transmitted in frame 7

TSA4[2]

Sa4 bit transmitted in frame 5

TSA4[1]

Sa4 bit transmitted in frame 3

TSA4[0]

Sa4 bit transmitted in frame 1

07C—Transmit Sa5 Byte Buffer (TSA5)

TSA5[7]

Sa5 bit transmitted in frame 15

TSA5[6]

Sa5 bit transmitted in frame 13

TSA5[5]

Sa5 bit transmitted in frame 11

TSA5[4]

Sa5 bit transmitted in frame 9

TSA5[3]

Sa5 bit transmitted in frame 7

TSA5[2]

Sa5 bit transmitted in frame 5

TSA5[1]

Sa5 bit transmitted in frame 3

TSA5[0]

Sa5 bit transmitted in frame 1