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BT8376EPF Datasheet(PDF) 247 Page - Synaptics Incorporated. |
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BT8376EPF Datasheet(HTML) 247 Page - Synaptics Incorporated. |
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247 / 323 page ![]() Bt8370/8375/8376 Fully Integrated T1/E1 Framer and Line Interface 3.17 System Bus Registers N8370DSE Conexant 3-129 TSIG_AB TSIG_AB—AB Signaling. In T1 mode, only AB signaling bits are updated from TSIGI to the TSIGn buffer. If SIGFRZ is active, the output CD signaling bits are copied from the buffered output AB bits, respectively. In E1 mode, setting TSIG_AB forces C = 0 and D = 1 when updating the TSIGn buffer. 0 = ABCD Signaling 1 = AB Signaling ASSIGN Assign System Bus Time Slot—During T1 line applications where the system bus group consists of 32 time slots, or a multiple of 32, any 24 out of 32 time slots can be assigned. The only time SBC [1:24] must be assigned is during 1536K or 1544K bus modes. The number of assigned system bus time slots must equal the number of line time slots; therefore, ASSIGN must be active in all 32 SBCn locations during E1 modes. The receiver does not update unassigned time slots as it fills the RSLIP buffer. T1 time slots are filled sequentially from RSLIP 1 to 24. Time slots 0 and 25 to 31 are reserved for unassigned values. Values are read from either assigned or unassigned locations in a sequential fashion based on the ASSIGN bit. System bus output data for unassigned time slots is taken from the RSLIP buffer, which the processor can fill with any desired 16-bit fixed value (8 bits in RSLIP_LO, plus 8 bits in RSLIP_HI). 0 = unassigned system bus time slot 1 = assigned system bus time slot 100–11F—Transmit Per-Channel Control (TPCn; n = 0 to 31) TB7ZS/EMFBIT Bit 7 Zero Code Substitution/Embedded F-bit Value (Applicable in T1 mode only)—For assigned system bus time slots [ASSIGN; addr 0E0-0FF], TB7ZS replaces bit 7 of the time slot with a one if examination of 8-bit output detects all zeros. For an unassigned time slot where TIDLE is active, EMFBIT replaces all embedded F-bit outputs with the programmed EMFBIT value. 0 = no effect or force embedded F-bit (low) 1 = enable B7ZS or force embedded F-bit (high) 7 6 5 4 3 2 1 0 TB7ZS/EMFBIT TLOOP TIDLE TLOCAL TSIGA/TSIGO TSIGB/RSIGO TSIGC TSIGD |
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