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BT8376EPF Datasheet(PDF) 248 Page - Synaptics Incorporated. |
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BT8376EPF Datasheet(HTML) 248 Page - Synaptics Incorporated. |
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248 / 323 page ![]() Bt8370/8375/8376 3.17 System Bus Registers Fully Integrated T1/E1 Framer and Line Interface 3-130 Conexant N8370DSE TLOOP Remote DS0 Channel Loopback—Transmits data supplied from RSLIP buffer contents. TLOOP works in conjunction with other TPCn control bits to select the source of transmitted data and signaling (see Table 3-23). TIDLE Transmit Idle—Transmit data supplied from TSLIP_LO buffer contents. The processor writes an 8-bit idle pattern to TSLIP_LO for output on the selected time slot, or optionally writes real-time data output to TSLIP_LO after each TFRAME interrupt [ISR3; addr 008]. Only TSLIP_HI buffer is updated from TPCMI to allow continued local DS0 channel loopback. 0 = normal data output 1 = transmit idle data output TLOCAL Transmit Local Signaling—When active, TLOCAL transmits TSIGA–TSIGD values in output ABCD signaling bits. 0 = TSIGO or RSIGO control output signaling 1 = transmit signaling from TSIGA–TSIGD In E1, when it is attempted to merge signaling embedded in the TPCMI datastream with signaling inserting by TLOCAL [TPCn; addr 100-11F], the signaling inserted by TLOCAL appears two time slots early with TX_ALIGN bit set in [TSB_CR; addr 0D4]. Therefore, signaling intended for TS1 would instead be inserted into TS31. TX_ALIGN needs to be set. This offset does not occur during local signaling insertion for all 32 time slots. In T1, transmitting local signaling should be synchronized with Transmit Multiframe interrupt [TMF_IER3; addr 010]. This would avoid transmitting intermediate values. TSIGA–TSIGD Transmit Local Signaling—Holds the 4-bit ABCD signaling value, which is output when TLOCAL is active. In AB only applications, such as T1/SF framing, TSIGC and TSIGD must also be written with the same data as TSIGA and TSIGB. In E1 modes, TS0 and TS16 local signaling value determines CAS multiframe alignment signal (MAS) and XYXX output. Table 3-23. Remote DS0 Channel Loopback TLOOP TIDLE TLOCAL TSIGO RSIGO Sig Source Data Source Channel Mode 0 0 0 0 0 None TPCMI Clear Channel 0 0 0 0 1 RSIGn TPCMI Rx Signaling 0 0 0 1 0 TSIGn TPCMI Tx Signaling 00 1 X X TSIGA–D TPCMI Local Signaling 0 1 0 0 0 None TSLIP_LO Idle Code 0 1 0 0 1 RSIGn TSLIP_LO Idle Code Rx Signaling 0 1 0 1 0 TSIGn TSLIP_LO Idle Code Tx Signaling 01 1 X X TSIGA–D TSLIP_LO Idle Code Local Signaling 1 X 0 0 0 None RXDATA Remote Loop 1 X 0 0 1 RSIGn RXDATA Remote Loop Rx Signaling 1 X 0 1 0 TSIGn RXDATA Remote Loop Tx Signaling 1X 1 X X TSIGA–D RXDATA Remote Loop Local Signaling NOTE(S): If RX Signaling, RSIGn output buffer supplies transmit signaling. |
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