SC1100 datasheet(135/348 Pages) NSC

135 / 348 page

Revision 1.1

135

www.national.com

Core Logic Module (Continued)

SL1 Sleep State (ACPI S1)

In this state the core processor is in 3V Suspend mode (all

its clocks are stopped, including the memory controller).

The SDRAM is placed in self-refresh mode. All other

SC1100 and system clocks are running. The frequency

multipliers (FMUL) and the PLLs are all running. All devices

are powered up (PWRCNT[2:1] and ONCTL# are all

asserted). See Section 5.2.9.5 "Usage Hints" on page 137.

No reset is performed, when exiting this state. The SC1100

keeps all context in this state. This state corresponds to

ACPI Sleep state S1.

SL2 Sleep State (ACPI S1)

In this state, all of the SC1100 clocks are stopped including

the FMULs and the PLLs, but not the 32 KHz oscillator.

Selected clocks from the FMULs and PLLs can be stopped.

The

SDRAM

placed

self-refresh

mode.

The

PWRCNT1 pin is deasserted. The SC1100 itself is pow-

ered up. The system designer can decide which other sys-

tem devices to power off with the PWRCNT1 pin.

No reset is performed, when exiting this state. The SC1100

keeps all context in this state. This state corresponds to

ACPI sleep state S1, with lower power and longer wake

time than in SL1.

SL3 Sleep State (ACPI S3)

In this state, the SDRAM is placed in self-refresh mode,

and PWRCNT[2:1] are deasserted. PWRCNT[2:1] should

be used to power off most of the system (except for the

SDRAM). If the Save-to-RAM feature is used, external cir-

cuitry in the SDRAM interface is required to guarantee data

integrity. All SC1100 signals powered by VSB, VSBL or

VBAT are still functional to allow wakeup and to maintain

the real-time clock.

The power-up sequence is performed, when exiting this

state. This state corresponds to ACPI sleep state SL3.

SL4 and SL5 Sleep States (ACPI S4 and S5)

The SL4 and SL5 states are similar from the hardware per-

spective.

these

states,

the

SC1100

deasserts

PWRCNT[2:1] and ONCTL#. PWRCNT[2:1] and ONCTL#

should be used to power off the system. All signals pow-

ered by VSB, VSBL or VBAT are still functional to allow

wakeup and to keep the real-time clock.

The power-up sequence is performed when exiting this

state. This state corresponds to ACPI Sleep states SL4

and SL5.

Table 5-5. Wakeup Events Capability

Event

S0/C1

S0/C3

SL1

SL2

SL3

SL4, SL5

Enabled Interrupts

Yes

SMI according to Table 5-8

Yes

SCI according to Table 5-8

Yes

GPIO[47:32], GPIO[15:0]

Yes

Power Button

Yes

Power Button Override

Yes

Bus Master Request

Yes1

Yes

---

Thermal Monitoring

Yes

USB

Yes

IRRX1 (Infrared)

Yes

GPWIO[2:0]

Yes

RI# (UART)

Yes

RTC

Yes

Temporarily exits state.

SC1100 Datasheet(PDF) 135 Page - National Semiconductor (TI)

SC1100 Datasheet(HTML) 135 Page - National Semiconductor (TI)

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL