SH7616 datasheet(287/935 Pages) RENESAS

287 / 935 page

Section 7 Bus State Controller (BSC)

Rev. 2.00 Mar 09, 2006 page 261 of 906

REJ09B0292-0200

Bits 5 and 4—Bus Size Specification for Area 2 (CS2) (A2SZ1, A2SZ0): Effective only when

ordinary space is set.

Bit 5: A2SZ1

Bit 4: A2SZ0

Description

Reserved (do not set)

Byte (8-bit) size

Word (16-bit) size

Longword (32-bit) size

(Initial value)

Bits 3 and 2—Bus Size Specification for Area 1 (CS1) (A1SZ1, A1SZ0)

Bit 3: A1SZ1

Bit 2: A1SZ0

Description

Reserved (do not set)

Byte (8-bit) size

Word (16-bit) size

Longword (32-bit) size

(Initial value)

Bits 1 and 0—Reserved: These bits are always read as 0. The write value should always be 0.

7.2.3

Bus Control Register 3 (BCR3)

Bit:

————

A4LW2 AHLW2 A1LW2 A0LW2

Initial value:

00001111

R/W:

RRRR

R/W

Bit:

76543210

DSWW1 DSWW0

—

BASEL

EDO

BWE

Initial value:

00000000

R/W:

R/W

Initialize the BASEL, EDO, and BWE bits after a power-on reset and do not write to them

thereafter. To change other bits by writing to them, write the same value as they are initialized to.

Do not access any space other than CS0 until the register initialization ends.

Bits 15 to 12—Reserved bits: These bits are always read as 0. The write value should always be 0.

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