Electronic Components Datasheet Search
  English  ▼

X  

Preview PDF HTML

SH7616 Datasheet(PDF) 292 Page - Renesas Technology Corp

Part # SH7616
Description  32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7600 Series
PDF  935 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7616 Datasheet(HTML) 292 Page - Renesas Technology Corp

Back Button SH7616 Datasheet HTML 288Page - Renesas Technology Corp SH7616 Datasheet HTML 289Page - Renesas Technology Corp SH7616 Datasheet HTML 290Page - Renesas Technology Corp SH7616 Datasheet HTML 291Page - Renesas Technology Corp SH7616 Datasheet HTML 292Page - Renesas Technology Corp SH7616 Datasheet HTML 293Page - Renesas Technology Corp SH7616 Datasheet HTML 294Page - Renesas Technology Corp SH7616 Datasheet HTML 295Page - Renesas Technology Corp SH7616 Datasheet HTML 296Page - Renesas Technology Corp Next Button
Zoom Inzoom in Zoom Outzoom out
 292 / 935 page
background image
Section 7 Bus State Controller (BSC)
Rev. 2.00 Mar 09, 2006 page 266 of 906
REJ09B0292-0200
A4WM
A3WM
A2WM
A1WM
A0WM
W41
W31
W21
W11
W01
W40
W30
W20
W10
W00
Description
0
0
0
External wait input ignored
1
External wait input enabled
1
0
External wait input enabled
1
External wait input enabled
(Initial value)
1
Don’t care
Don’t care
External wait input ignored
Bits 7 to 4—Reserved bits: These bits are always read as 0. The write value should always be 0.
Bits 3 and 2—Idles between Cycles for Area 4 (IW41, IW40): These bits specify idle cycles
inserted between cycles in CS4 in the same way as for CS 0 to 3. The set values below show the
minimum number of idle cycles; more cycles than indicated by the Idles between Cycles setting
may actually be inserted.
Bit 3: IW41
Bit 2: IW40
Description
0
0
No idle cycle
1
One idle cycle inserted
1
0
Two idle cycles inserted
(Initial value)
1
Four idle cycles inserted
Bits 1 and 0—Wait Control for Area 4 (W41, W40): These bits specify waits for CS4 in the same
way as for areas 0 to 3.
Bit 1: W41
Bit 0: W40
Description
0
0
No wait. External wait input disabled without wait
1
One wait. External wait input enabled with one wait
1
0
Two waits. External wait input enabled with two waits
1
Complies with the long wait specification of bus control
registers 1 and 3 (BCR1, BCR3). External wait input is
enabled
(Initial value)



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com