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DS26521 Datasheet(PDF) 135 Page - Maxim Integrated Products |
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DS26521 Datasheet(HTML) 135 Page - Maxim Integrated Products |
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135 / 258 page ![]() DS26521 Single T1/E1/J1 Transceiver 135 of 258 Register Name: RESCR Register Description: Receive Elastic Store Control Register Register Address: 085h Bit # 7 6 5 4 3 2 1 0 Name RDATFMT RGCLKEN — RSZS RESALGN RESR RESMDM RESE Default 0 0 0 0 0 0 0 0 Bit 7: Receive Channel Data Format (RDATFMT). 0 = 64kbps (data contained in all 8 bits) 1 = 56kbps (data contained in 7 out of the 8 bits) Bit 6: Receive Gapped Clock Enable (RGCLKEN). 0 = RCHCLK functions normally 1 = Enable gapped bit clock output on RCHCLK Note: RGPCKEN and RDATFMT are not associated with the elastic store and are explained in the fractional support section. Bit 4: Receive Slip Zone Select (RSZS). This bit determines the minimum distance allowed between the elastic store read and write pointers before forcing a controlled slip. This bit only applies during T1-to-E1 or E1-to-T1 conversion applications. 0 = force a slip at 9 bytes or less of separation (used for clustered blank channels) 1 = force a slip at 2 bytes or less of separation (used for distributed blank channels and minimum delay mode) Bit 3: Receive Elastic Store Align (RESALGN). Setting this bit from 0 to 1 forces the receive elastic store’s write/read pointers to a minimum separation of half a frame. No action is taken if the pointer separation is already greater or equal to half a frame. If pointer separation is less than half a frame, the command is executed and the data is disrupted. This bit should be toggled after RSYSCLK has been applied and is stable. It must be cleared and set again for a subsequent align. Bit 2: Receive Elastic Store Reset (RESR). Setting this bit from 0 to 1 forces the read pointer into the same frame that the write pointer is exiting, minimizing the delay through the elastic store. If this command should place the pointers within the slip zone (see bit 4), then an immediate slip occurs and the pointers move back to opposite frames. Should be toggled after RSYSCLK has been applied and is stable. Do not leave this bit set HIGH. Bit 1: Receive Elastic Store Minimum Delay Mode (RESMDM). 0 = elastic stores operate at full two-frame depth 1 = elastic stores operate at 32-bit depth Bit 0: Receive Elastic Store Enable (RESE). 0 = elastic store is bypassed 1 = elastic store is enabled |
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