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DS26521 Datasheet(PDF) 132 Page - Maxim Integrated Products

Part # DS26521
Description  Single T1/E1/J1 Transceiver
PDF  258 Pages
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Manufacturer  MAXIM [Maxim Integrated Products]
Direct Link  https://www.maximintegrated.com/en.html
Logo MAXIM - Maxim Integrated Products

DS26521 Datasheet(HTML) 132 Page - Maxim Integrated Products

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DS26521 Single T1/E1/J1 Transceiver
132 of 258
Register Name:
E1RCR2 (E1 Mode)
Register Description:
Receive Control Register 2
Register Address:
082h
Bit #
7
6
5
4
3
2
1
0
Name
RSa8S
RSa7S
RSa6S
RSa5S
RSa4S
—
—
RLOSA
Default
0
0
0
0
0
0
0
0
Note: This register has an alternate definition for T1 mode. See T1RIBCC.
Bit 7: Sa8 Bit Select (RSa8S). Set to one to have RLCLK pulse at the Sa8 bit position; set to zero to force RLCLK
low during Sa8 bit position.
Bit 6: Sa7 Bit Select (RSa7S). Set to one to have RLCLK pulse at the Sa7 bit position; set to zero to force RLCLK
low during Sa7 bit position.
Bit 5: Sa6 Bit Select (RSa6S). Set to one to have RLCLK pulse at the Sa6 bit position; set to zero to force RLCLK
low during Sa6 bit position.
Bit 4: Sa5 Bit Select (RSa5S). Set to one to have RLCLK pulse at the Sa5 bit position; set to zero to force RLCLK
low during Sa5 bit position.
Bit 3: Sa4 Bit Select (RSa4S). Set to one to have RLCLK pulse at the Sa4 bit position; set to zero to force RLCLK
low during Sa4 bit position.
Bit 0: Receive Loss of Signal Alternate Criteria (RLOSA). Defines the criteria for a loss-of-signal condition.
0 = LOS declared upon 255 consecutive zeros (125
μs)
1 = LOS declared upon 2048 consecutive zeros (1ms)



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