| Electronic Components Datasheet Search |
|
DS26521 Datasheet(PDF) 130 Page - Maxim Integrated Products |
|
|
|||||||||||||||||||||||||||||
DS26521 Datasheet(HTML) 130 Page - Maxim Integrated Products |
|
130 / 258 page ![]() DS26521 Single T1/E1/J1 Transceiver 130 of 258 Register Name: RCR1 (E1 Mode) Register Description: Receive Control Register 1 Register Address: 081h Bit # 7 6 5 4 3 2 1 0 Name — RHDB3 RSIGM RG802 RCRC4 FRC SYNCE RESYNC Default 0 0 0 0 0 0 0 0 Note: This register has an alternate definition for T1 mode. See RCR1 . Bit 6: Receive HDB3 Enable (RHDB3). 0 = HDB3 disabled 1 = HDB3 enabled (decoded per O.162) Bit 5: Receive-Signaling Mode Select (RSIGM). 0 = CAS signaling mode 1 = CCS signaling mode Bit 4: Receive G.802 Enable (RG802). See Figure 10-23 for details. 0 = do not force RCHBLK high during bit 1 of time slot 26 1 = force RCHBLK high during bit 1 of time slot 26 Bit 3: Receive CRC-4 Enable (RCRC4). 0 = CRC-4 disabled 1 = CRC-4 enabled Bit 2: Frame Resync Criteria (FRC). 0 = resync if FAS received in error three consecutive times 1 = resync if FAS or bit 2 of non-FAS is received in error three consecutive times Bit 1: Sync Enable (SYNCE). 0 = auto resync enabled 1 = auto resync disabled Bit 0: Resynchronize (RESYNC). When toggled from low to high, a resynchronization of the receive-side framer is initiated. Must be cleared and set again for a subsequent resync. |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |