DS26521 datasheet(186/258 Pages) MAXIM

186 / 258 page

DS26521 Single T1/E1/J1 Transceiver

186 of 258

TIOCR

Transmit I/O Configuration Register

184h

Bit #

Name

TCLKINV

TSYNCINV

TSSYNCINV

TSCLKM

TSSM

TSIO

TSDW

TSM

TCLKINV

TSYNCINV

TSSYNCINV

TSCLKM

TSSM

TSIO

—

TSM

Default

Bit 7: TCLK Invert (TCLKINV).

0 = No inversion

1 = Invert

Bit 6: TSYNC Invert (TSYNCINV).

0 = No inversion

1 = Invert

Bit 5: TSSYNCIO Invert (TSSYNCINV) (Input Mode Only).

0 = No inversion

1 = Invert

Bit 4: TSYSCLK Mode Select (TSCLKM).

0 = if TSYSCLK is 1.544MHz

1 = if TSYSCLK is 2.048/4.096/8.192MHz or IBO enabled (see Section 8.8.2 for details on IBO function)

Bit 3: TSSYNCIO Mode Select (TSSM). Selects frame or multiframe mode for the TSSYNCIO pin.

0 = frame mode

1 = multiframe mode

Bit 2: TSYNC I/O Select (TSIO).

0 = TSYNC is an input

1 = TSYNC is an output

Bit 1: TSYNC Double-Wide (TSDW) (T1 Mode Only). (Note: This bit must be set to zero when TSM = 1 or when

TSIO = 0.)

0 = do not pulse double-wide in signaling frames

1 = do pulse double-wide in signaling frames

Bit 0: TSYNC Mode Select (TSM). Selects frame or multiframe mode for the TSYNC pin.

0 = frame mode

1 = multiframe mode

DS26521 Datasheet(PDF) 186 Page - Maxim Integrated Products

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