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BT8376EPF Datasheet(PDF) 124 Page - Synaptics Incorporated.

Part # BT8376EPF
Description  single chip transceivers for T1/E1 and Integrated Service Digital Network (ISDN) primary rate interfaces
PDF  323 Pages
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Manufacturer  CONEXANT [Synaptics Incorporated.]
Direct Link  https://www.synaptics.com/
Logo CONEXANT - Synaptics Incorporated.

BT8376EPF Datasheet(HTML) 124 Page - Synaptics Incorporated.

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3.0 Registers
Bt8370/8375/8376
3.1 Address Map
Fully Integrated T1/E1 Framer and Line Interface
3-6
Conexant
N8370DSE
0A4
DL1_TS
R/W
DL1 Time Slot Enable
00
00
00
0A5
DL1_BIT
R/W
DL1 Bit Enable
00
00
00
0A6
DL1_CTL
R/W
DL1 Control
00
00
00
0A7
RDL1_FFC
R/W
RDL #1 FIFO Fill Control
00
00
00
0A8
RDL1
R
Receive Data Link FIFO #1
——
—
0A9
RDL1_STAT
R
RDL #1 Status
——
—
0AA
PRM
R/W
Performance Report Message
00
00
00
0AB
TDL1_FEC
R/W
TDL #1 FIFO Empty Control
00
00
00
0AC
TDL1_EOM
W
TDL #1 End Of Message
Control
——
—
0AD
TDL1
R/W
Transmit Data Link FIFO #1
——
—
0AE
TDL1_STAT
R
TDL #1 Status
——
—
0AF
DL2_TS
R/W
DL2 Time Slot Enable
00
00
N/A
0B0
DL2_BIT
R/W
DL2 Bit Enable
00
00
N/A
0B1
DL2_CTL
R/W
DL2 Control
00
00
N/A
0B2
RDL2_FFC
R/W
RDL #2 FIFO Fill Control
00
00
N/A
0B3
RDL2
R
Receive Data Link FIFO #2
——
—
0B4
RDL2_STAT
R
RDL #2 Status
——
—
0B6
TDL2_FEC
R/W
TDL #2 FIFO Empty Control
00
00
N/A
0B7
TDL2_EOM
W
TDL #2 End Of Message
Control
——
—
0B8
TDL2
R/W
Transmit Data Link FIFO #2
——
—
0B9
TDL2_STAT
R
TDL #2 Status
——
—
0BA
DL_TEST1
R/W
DLINK Test Configuration
00
00
00
0BB
DL_TEST2
R/W
DLINK Test Status
00
00
00
0BC
DL_TEST3
R/W
DLINK Test Status
00
00
00
0BD
DL_TEST4
R/W
DLINK Test Control #1 or
Configuration #2
00
00
00
0BE
DL_TEST5
R/W
DLINK Test Control #2 or
Configuration #2
00
00
00
Table 3-1. Address Map (6 of 8)
Address
(Hex)
Acronym
R/W
Description
Default Register Setting
Bt8370
Bt8375
Bt8376



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