BT8376EPF datasheet(215/323 Pages) CONEXANT

215 / 323 page

Bt8370/8375/8376

Fully Integrated T1/E1 Framer and Line Interface

3.16 Data Link Registers

N8370DSE

Conexant

3-97

Abort status is reported if the receiver detects a string of 7 or more consecutive 1s during an

HDLC message. FCS error status is reported if FCS mode is enabled, and the checksum

calculated over the received HDLC message does not match the received 16-bit FCS.

Non-integer error status is reported if the receiver detects a closing FLAG character that yields

an HDLC message length that is not an integer number of 8-bit octets.

00 = Good

01 = FCS/Non-integer

10 = Abort

11 = Partial

RDL1_CNT[5:0]

Byte Count [5:0]—Indicates the number of Message Data [WORD1] bytes stored in

subsequent consecutive FIFO locations and which constitute one received message. The

reported byte count is the actual number of bytes, from 0 to 63 bytes, where 0 indicates 0 bytes

for the processor to read. The processor can either read the specified number of message data

bytes consecutively from RDL1, or poll RDL1_STAT after reading each data byte until

RDL1_STAT reports an end of message (i.e., RMPTY1=1 or RSTAT1=1).

WORD1: Message Data

RDL1[7:0]

Receive Message Data—Filled by the receiver data link, from LSB to MSB, with bits from the

selected channel. The processor reads 8-bit FIFO data during HDLC and Pack8 modes. During

Pack6 mode, only the six least significant bits RDL1[5:0] are filled.

0A9—RDL #1 Status (RDL1_STAT)

RMSG1

In-Progress Receive Message—Real time status of receive message sequencer is provided

mostly for processor-polled applications. During HDLC modes, RMSG1 is high for the

interval between opening and closing FLAG characters to indicate that the receiver is filling

FIFO locations (in which case RSTAT1 is also held high). RMSG1 is low while the channel

receives FLAG or abort characters. During unformatted modes, RMSG1 is high continuously.

0 = channel idle

1 = channel actively filling FIFO

RSTAT1

Next, FIFO Read Equals Message Status—For non-empty FIFO conditions (RMPTY1=0),

RSTAT1 indicates that the next byte read from RDL1 returns WORD0 message status or

WORD1 message data. RSTAT1 equals zero if the FIFO is empty and no message is

in-progress. The processor polls RSTAT1 before reading RDL1 to determine how to interpret

RDL1 read byte value, or the processor checks RSTAT1 in response to RMSG interrupt [ISR2;

addr 009].

0 = RDL1 byte equals Message Data (or empty FIFO, if RMTPY1=1)

1 = RDL1 byte equals Message Status (if RMPTY1=0)

RDL1[7]

RDL1[6]

RDL1[5]

RDL1[4]

RDL1[3]

RDL1[2]

RDL1[1]

RDL1[0]

———

RMSG1

RSTAT1

RMPTY1

RNEAR1

RFULL1

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