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SC1100 Datasheet(PDF) 312 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part # SC1100
Description  Geode??Information Appliance On a Chip
PDF  348 Pages
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Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

SC1100 Datasheet(HTML) 312 Page - National Semiconductor (TI)

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312
Revision 1.1
Electrical Specifications (Continued)
Table 7-20. PIO Data Transfer to/from Device
Symbol
Parameter
Mode 0
(ns)
Mode
1 (ns)
Mode
2 (ns)
Mode
3 (ns)
Mode
4 (ns)
t0
Cycle time1 (min)
600
383
240
180
120
t1
Address valid to IDE_IOR[0:1]#/IDE_IOW[0:1]# setup
(min)
70
50
30
30
25
t2
IDE_IOR[0:1]#/IDE_IOW[0:1]# 16-bit1 (min)
165
125
100
80
70
t2i
IDE_IOR[0:1]#/IDE_IOW[0:1]# recovery time1 (min)
--
-
70
25
t3
IDE_IOW[0:1]# data setup (min)
60
45
30
30
20
t4
IDE_IOW[0:1]# data hold (min)
30
20
15
10
10
t5
IDE_IOR[0:1]# data setup (min)
50
35
202020
t6
IDE_IOR[0:1]# data hold (min)
5
5
5
5
5
t6Z
IDE_IOR[0:1]# data TRI-STATE2 (max)
30
30
30
30
30
t9
IDE_IOR[0:1]#/IDE_IOW[0:1]# to address valid hold
(min)
20
15
10
10
10
tRD
Read Data Valid to IDE_IORDY[0,1] active
(if IDE_IORDY[0:1] initially low after tA) (min)
00
0
0
0
tA
IDE_IORDY[0:1] Setup time3
35
35
35
35
35
tB
IDE_IORDY[0:1] Pulse Width (max)
1250
1250
1250
1250
1250
tC
IDE_IORDY[0:1] assertion to release (max)
5
5
5
5
5
1.
t0 is the minimum total cycle time, t2 is the minimum command active time, and t2i is the minimum command recovery
time or command inactive time. The actual cycle time equals the sum of the command active time and the command
inactive time. The three timing requirements of t0, t2, and t2i are met. The minimum total cycle time requirement is great-
er than the sum of t2 and t2i. (This means that a host implementation may lengthen t2 and/or t2i to ensure that t0 is equal
to or greater than the value reported in the device’s IDENTIFY DEVICE data.)
2.
This parameter specifies the time from the rising edge of IDE_IOR[0:1]# to the time that the data bus is no longer driven
by the device (TRI-STATE).
3.
The delay from the activation of IDE_IOR[0:1]# or IDE_IOW[0:1]# until the state of IDE_IORDY[0:1] is first sampled. If
IDE_IORDY[0:1] is inactive, then the host waits until IDE_IORDY[0:1] is active before the PIO cycle is completed. If the
device is not driving IDE_IORDY[0:1] negated after the activation (tA) of IDE_IOR[0:1]# or IDE_IOW[0:1]#, then t5 is
met and tRD is not applicable. If the device is driving IDE_IORDY[0:1] negated after the activation (tA) of IDE_IOR[0:1]#
or IDE_IOW[0:1]#, then tRD is met and t5 is not applicable.



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