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DS26521 Datasheet(PDF) 105 Page - Maxim Integrated Products |
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DS26521 Datasheet(HTML) 105 Page - Maxim Integrated Products |
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105 / 258 page ![]() DS26521 Single T1/E1/J1 Transceiver 105 of 258 Register Name: GLSRR Register Description: Global LIU Software Reset Register Register Address: 0F5h Bit # 7 6 5 4 3 2 1 0 Name — — — — — — — LSRST1 Default 0 0 0 0 0 0 0 0 Bit 0: LIU Software Reset (LSRST1). LIU logic and registers are reset with a 0-to-1 transition in this bit. The reset is released when a zero is written to this bit. 0 = Normal operation 1 = Reset LIU Register Name: GFSRR Register Description: Global Framer and BERT Software Reset Register Register Address: 0F6h Bit # 7 6 5 4 3 2 1 0 Name — — — — — — — FSRST1 Default 0 0 0 0 0 0 0 0 Bit 0: Framer and BERT Software Reset (FSRST1). Framer logic and registers are reset with a 0-to-1 transition in this bit. The reset is released when a zero is written to this bit. 0 = Normal operation 1 = Reset framer and BERT |
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