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DS26521 Datasheet(PDF) 107 Page - Maxim Integrated Products |
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DS26521 Datasheet(HTML) 107 Page - Maxim Integrated Products |
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107 / 258 page  DS26521 Single T1/E1/J1 Transceiver 107 of 258 Register Name: GFISR Register Description: Global Framer Interrupt Status Register Register Address: 0F9h Bit # 7 6 5 4 3 2 1 0 Name — — — — — — — FIS1 Default 0 0 0 0 0 0 0 0 The GFISR register reports the framer interrupt status for the T1/E1 framer. A logic one indicates the framer has set its interrupt signal. Bit 0: Framer Interrupt Status 1 (FIS1). 0 = Framer 1 has not issued an interrupt. 1 = Framer 1 has issued an interrupt. Register Name: GBISR Register Description: Global BERT Interrupt Status Register Register Address: 0FAh Bit # 7 6 5 4 3 2 1 0 Name — — — — — — — BIS1 Default 0 0 0 0 0 0 0 0 The GBISR register reports the interrupt status for the T1/E1 bit error-rate testers (BERTs). A logic one indicates the BERT has set its interrupt signal. Bit 0: BERT Interrupt Status 1 (BIS1). 0 = BERT 1 has not issued an interrupt. 1 = BERT 1 has issued an interrupt. Register Name: GLISR Register Description: Global LIU Interrupt Status Register Register Address: 0FBh Bit # 7 6 5 4 3 2 1 0 Name — — — — — — — LIS1 Default 0 0 0 0 0 0 0 0 The GLISR register reports the LIU interrupt status for the T1/E1 LIUs. A logic one indicates the LIU has set its interrupt signal. Bit 0: LIU Interrupt Status 1 (LIS1). 0 = LIU 1 has not issued an interrupt. 1 = LIU 1 has issued an interrupt. |
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