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DS26521 Datasheet(PDF) 112 Page - Maxim Integrated Products |
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DS26521 Datasheet(HTML) 112 Page - Maxim Integrated Products |
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112 / 258 page ![]() DS26521 Single T1/E1/J1 Transceiver 112 of 258 Register Name: T1RCR2 (T1 Mode) Register Description: Receive Control Register 2 Register Address: 014h Bit # 7 6 5 4 3 2 1 0 Name — — — RSLC96 OOF2 OOF1 RAIIE RD4RM Default 0 0 0 0 0 0 0 0 Bit 4: Receive SLC-96 Synchronizer Enable (RSLC96). See Section 8.9.4.5 for SLC-96 details. 0 = SLC-96 synchronizer is disabled 1 = SLC-96 synchronizer is enabled Bits 3 and 2: Out of Frame Select Bits (OOF[2:1]). OOF2 OOF1 OUT OF FRAME CRITERIA 0 0 2/4 frame bits in error 0 1 2/5 frame bits in error 1 0 2/6 frame bits in error 1 1 2/6 frame bits in error Bit 1: Receive RAI Integration Enable (RAIIE). The ESF RAI indication can be interrupted for a period not to exceed 100ms per interruption (T1.403). In ESF mode, setting RAIIE will cause the RAI status from the DS26521 to be integrated for 200ms. 0 = RAI detects when 16 consecutive patterns of 00FF appear in the FDL. RAI clears when 14 or fewer patterns of 00FF hex out of 16 possible appear in the FDL. 1 = RAI detects when the condition has been present for greater than 200ms. RAI clears when the condition has been absent for greater than 200ms. Bit 0: Receive-Side D4 Remote Alarm Select (RD4RM). 0 = zeros in bit 2 of all channels 1 = a one in the S-bit position of frame 12 (J1 Yellow Alarm Mode) |
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