DS26521 datasheet(114/258 Pages) MAXIM

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DS26521 Single T1/E1/J1 Transceiver

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T1RBOCC (T1 Mode Only)

Receive BOC Control Register

015h

Bit #

Name

RBR

—

RBD1

RBD0

—

RBF1

RBF0

—

Default

Bit 7: Receive BOC Reset (RBR). The host should set this bit to force a reset of the BOC circuitry. Note that this is

an acknowledged reset, that is, the host need only set the bit and the DS26521 will clear it once the reset operation

is complete (less than 250

μs). Modifications to the RBF[1:0] and RBD[1:0] bits will not be applied to the BOC

controller until a BOC reset has been completed.

Bits 5 and 4: Receive BOC Disintegration Bits (RBD[1:0]). The BOC disintegration filter sets the number of

message bits that must be received without a valid BOC to set the BC bit indicating that a valid BOC is no longer

being received.

RBD1

RBD0

CONSECUTIVE MESSAGE BITS

FOR BOC CLEAR IDENTIFICATION

64 (See Note 1)

Bits 2 and 1: Receive BOC Filter Bits (RBF[1:0). The BOC filter sets the number of consecutive patterns that

must be received without error prior to an indication of a valid message.

RBF1

RBF0

CONSECUTIVE BOC CODES FOR

VALID SEQUENCE IDENTIFICATION

None

7 (See Note 1)

Note 1: The DS26521’s BOC controller does not integrate and disintegrate concurrently. Therefore, if the maximum integration

time and the maximum disintegration time are used together, BOC messages that repeat fewer than 11 times may not be

detected.

RIDR1 to RIDR32

Receive Idle Code Definition Registers 1 to 32

020h to 03Fh

Bit #

Name

Default

Bits 7 to 0: Per-Channel Idle Code Bits (C[7:0]). C0 is the LSB of the code (this bit is transmitted last). Address

020h is for channel 1. Address 037h is for channel 24. Address 03Fh is for channel 32. RIDR1:RIDR24 are T1

mode only. RIDR25:RIDR32 are E1 mode only.

DS26521 Datasheet(PDF) 114 Page - Maxim Integrated Products

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