DS26521 datasheet(113/258 Pages) MAXIM

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DS26521 Single T1/E1/J1 Transceiver

113 of 258

E1RSAIMR (E1 Mode Only)

Receive Sa-Bit Interrupt Mask Register

014h

Bit #

Name

—

RSa4IM

RSa5IM

RSa6IM

RSa7IM

RSa8IM

Default

Bit 4: Sa4 Change Detect Interrupt Mask (RSa4IM). This bit will enable the change detect interrupt for the Sa4

bits. Any change of state of the Sa4 bit will then generate an interrupt in RLS7.0 to indicate the change of state.

0 = Interrupt masked.

1 = Interrupt enabled.

Bit 3: Sa5 Change Detect Interrupt Mask (RSa5IM). This bit will enable the change detect interrupt for the Sa5

bits. Any change of state of the Sa5 bit will then generate an interrupt in RLS7.0 to indicate the change of state.

0 = Interrupt masked.

1 = Interrupt enabled.

Bit 2: Sa6 Change Detect Interrupt Mask (RSa6IM). This bit will enable the change detect interrupt for the Sa6

bits. Any change of state of the Sa6 bit will then generate an interrupt in RLS7.0 to indicate the change of state.

0 = Interrupt masked.

1 = Interrupt enabled.

Bit 1: Sa7 Change Detect Interrupt Mask (RSa7IM). This bit will enable the change detect interrupt for the Sa7

bits. Any change of state of the Sa7 bit will then generate an interrupt in RLS7.0 to indicate the change of state.

0 = Interrupt masked.

1 = Interrupt enabled.

Bit 0: Sa8 Change Detect Interrupt Mask (RSa8IM). This bit will enable the change detect interrupt for the Sa8

bits. Any change of state of the Sa8 bit will then generate an interrupt in RLS7.0 to indicate the change of state.

0 = Interrupt masked.

1 = Interrupt enabled.

DS26521 Datasheet(PDF) 113 Page - Maxim Integrated Products