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GX1 Datasheet(PDF) 157 Page - National Semiconductor (TI) |
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GX1 Datasheet(HTML) 157 Page - National Semiconductor (TI) |
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157 / 247 page ![]() Revision 1.0 157 www.national.com Integrated Functions (Continued) 4.5.14.1 CS5530 Video Port Data Transfer VID_VAL indicates that the GX1 processor has placed valid data on VID_DATA[7:0]. VID_RDY indicates that the CS5530 is ready to accept the next byte of video data. VID_DATA[7:0]is advancedwhenbothVID_VAL and VID_RDY are asserted. VID_RDY is driven one clock early to the GX1 processor while VID_VAL is driven coincident with VID_DATA[7:0]. A sample interface functional timing diagram is shown in Figure 4-17. Figure 4-17. Video Port Data Transfer (CS5530) VID_CLK VID_VAL 8CLKs 8+ 3CLKs VID_RDY 3CLKs 4CLKs 8CLKs 1 2 CLK CLKs 1 CLK 2 CLKs 2 CLKs 4CLKs Note: VID_CLK = CORE_CLK/2 Invalid Data VID_DATA [7:0] |
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