GX1 datasheet(192/247 Pages) NSC

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192

Revision 1.0

Electrical Specifications (Continued)

6.5.2.3

Definition of System Conditions for Measuring “On” Parameters

Processor current is highly dependent two functional char-

acteristics, DCLK (DOT clock) and SDRAM frequency.

Table 6-6 shows how these factors are controlled when

measuring the typical average and absolute maximum pro-

cessor current parameters.

Table 6-6. System Conditions Used to Determine CPU’s Current Used During the "On" State

CPU Current Measurement

System Conditions

VCC2

VCC3

DCLK Freq2

SDRAM Freq3

Typical Average

Nominal

50 MHz4

Nominal5

Absolute Maximum

Max

135 MHz6

Max7

See Table 6-4 on page 190 for nominal and maximum voltages.

Not all system designs support display modes that require a DCLK of 135 MHz. Therefore, absolute maximum current

will not be realized in all system designs. Refer to the de-rating curve in Figure 6-3 on page 196 to calculate absolute

maximum current based on the system’s parameters.

SDRAM speeds between 79 MHz and 100 MHz are only supported for particular types of closed system designs. There-

fore, absolute maximum current will not be realized in most system designs. Refer to the de-rating curve in Figure 6-3

on page 196 to calculate absolute maximum current based on the system’s parameters.

A DCLK frequency of 50 MHz is derived by setting the display mode to 800x600x8 bpp at 75 Hz, using a display image

of vertical stripes (4-pixel wide) alternating between black and white with power management disabled.

SDRAM nominal frequency represents a single value that the memory controller can be configured for, between 66 MHz

and 78 MHz, based on a given core clock frequency:

166 MHz (5x) / 2.5 = 66.67 MHz

200 MHz (6x) / 3.0 = 66.67 MHz

233 MHz (7x) / 3.0 = 77.78 MHz

266 MHz (8x) / 3.5 = 76.19 MHz

300 MHz (9x) / 4.0 = 75.0 MHz

A DCLK frequency of 135 MHz is derived by setting the display mode to 1280x1024x8 bpp at 75 Hz, using a display

image of vertical stripes (1-pixel wide) alternating between black and white with power management disabled.

SDRAM max frequency represents the highest frequency that the memory controller can be configured, up to 100 MHz,

based on a given core clock frequency:

166 MHz (5x) / 2.0 = 83.3 MHz

200 MHz (6x) / 2.0 = 100.0 MHz

233 MHz (7x) / 2.5 = 93.3 MHz

266 MHz (8x) / 3.0 = 88.9 MHz

300 MHz (9x) / 3.0 = 100.0 MHz

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